| | 3 | {{{ |
| | 4 | #!graphviz |
| | 5 | |
| | 6 | digraph G{ |
| | 7 | rankdir=LR; |
| | 8 | node [fontsize=6, width=2.0]; |
| | 9 | "Cluster Computing" -> "System Architecture"; |
| | 10 | "Cluster Computing" -> "Parallel Programming"; |
| | 11 | "Cluster Computing" -> "Parallel Algorithms and Application"; |
| | 12 | "System Architecture" -> "Processor Architecture"; |
| | 13 | "System Architecture" -> "Network Architecture"; |
| | 14 | "System Architecture" -> "Storage Architecture"; |
| | 15 | "System Architecture" -> "System-Level Middleware"; |
| | 16 | "Network Architecture" -> "Network Interface"; |
| | 17 | "Network Architecture" -> "Network Topology"; |
| | 18 | "Network Architecture" -> "Network Communication Protocals"; |
| | 19 | "Parallel Programming" -> "Shared Memory Programming"; |
| | 20 | "Parallel Programming" -> "Distributed Memory Programming"; |
| | 21 | "Parallel Programming" -> "Application-Level Middleware Programming"; |
| | 22 | "Processor Architecture" -> "Symmetric Multi-Processor (SMP)"; |
| | 23 | "Processor Architecture" -> "Cache-Coherent Non-Uniform Memory Access (CC-NUMA)"; |
| | 24 | } |
| | 25 | }}} |