Index: /gpxe_study/kernel_2.6.20_src/sis900.c =================================================================== --- /gpxe_study/kernel_2.6.20_src/sis900.c (revision 3) +++ /gpxe_study/kernel_2.6.20_src/sis900.c (revision 4) @@ -54,6 +54,6 @@ #include #include +#include #include -#include #include #include @@ -97,5 +97,4 @@ /* Time in jiffies before concluding the transmitter is hung. */ #define TX_TIMEOUT (4*HZ) - enum { SIS_900 = 0, @@ -118,8 +117,8 @@ static const struct mii_chip_info { - const char * name; - u16 phy_id0; - u16 phy_id1; - u8 phy_types; + const char * name; + u16 phy_id0; + u16 phy_id1; + u8 phy_types; #define HOME 0x0001 #define LAN 0x0002 @@ -127,27 +126,27 @@ #define UNKNOWN 0x0 } mii_chip_table[] = { - { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN }, - { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN }, - { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN }, - { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN }, - { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN }, - { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN }, - { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME}, - { "ICS LAN PHY", 0x0015, 0xF440, LAN }, + {"SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN }, + {"SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN }, + {"SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN }, + {"AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN }, + {"AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME}, + {"ICS LAN PHY", 0x0015, 0xF440, LAN }, + {"NS 83851 PHY",0x2000, 0x5C20, MIX }, + {"Realtek RTL8201 PHY", 0x0000, 0x8200, LAN }, + {"VIA 6103 PHY", 0x0101, 0x8f20, LAN }, + {"ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN }, { "ICS LAN PHY", 0x0143, 0xBC70, LAN }, - { "NS 83851 PHY", 0x2000, 0x5C20, MIX }, { "NS 83847 PHY", 0x2000, 0x5C30, MIX }, - { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN }, - { "VIA 6103 PHY", 0x0101, 0x8f20, LAN }, + {"Altimata AC101LF PHY", 0x0022, 0x5520, LAN }, {NULL,}, }; struct mii_phy { - struct mii_phy * next; - int phy_addr; - u16 phy_id0; - u16 phy_id1; - u16 status; - u8 phy_types; + struct mii_phy * next; + int phy_addr; + u16 phy_id0; + u16 phy_id1; + u16 status; + u8 phy_types; }; @@ -236,5 +235,5 @@ /** - * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model + * sis900_get_mac_addr: - Get MAC address for stand alone SiS900 model * @pci_dev: the sis900 pci device * @net_dev: the net device to get address for @@ -260,11 +259,54 @@ /* get MAC address from EEPROM */ for (i = 0; i < 3; i++) - ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); - + ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); return 1; } /** - * sis630e_get_mac_addr - Get MAC address for SiS630E model + * sis96x_get_mac_addr: - Get MAC address for SiS962 or SiS963 model + * @pci_dev: the sis900 pci device + * @net_dev: the net device to get address for + * + * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM + * is shared by + * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first + * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access + * by LAN, otherwise is not. After MAC address is read from EEPROM, send + * EEDONE signal to refuse EEPROM access by LAN. + * The EEPROM map of SiS962 or SiS963 is different to SiS900. + * The signature field in SiS962 or SiS963 spec is meaningless. + * MAC address is read into @net_dev->dev_addr. + */ + +static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev, + struct net_device *net_dev) +{ + long ioaddr = net_dev->base_addr; + long ee_addr = ioaddr + mear; + u32 waittime = 0; + int i; + + outl(EEREQ, ee_addr); + while(waittime < 2000) { + if(inl(ee_addr) & EEGNT) { + + /* get MAC address from EEPROM */ + for (i = 0; i < 3; i++) + ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); + + outl(EEDONE, ee_addr); + return 1; + } else { + udelay(1); + waittime ++; + } + } + outl(EEDONE, ee_addr); + return 0; +} + + +/** + * sis630e_get_mac_addr: - Get MAC address for SiS630E model * @pci_dev: the sis900 pci device * @net_dev: the net device to get address for @@ -281,5 +323,4 @@ u8 reg; int i; - isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge); if (!isa_bridge) @@ -290,8 +331,10 @@ return 0; } + pci_read_config_byte(isa_bridge, 0x48, ®); pci_write_config_byte(isa_bridge, 0x48, reg | 0x40); - for (i = 0; i < 6; i++) { + for (i = 0; i < 6; i++) + { outb(0x09 + i, 0x70); ((u8 *)(net_dev->dev_addr))[i] = inb(0x71); @@ -304,12 +347,14 @@ -/** - * sis635_get_mac_addr - Get MAC address for SIS635 model - * @pci_dev: the sis900 pci device - * @net_dev: the net device to get address for - * - * SiS635 model, set MAC Reload Bit to load Mac address from APC - * to rfdr. rfdr is accessed through rfcr. MAC address is read into - * @net_dev->dev_addr. + + +/** + * sis635_get_mac_addr - Get MAC address for SIS635 + * @pci_dev: the sis900 pci device + * @net_dev: the net device to get address for + * + * SiS635 model, set MAC Reload Bit to load Mac address from APC + * to rfdr. rfdr is accessed through rfcr. MAC address is read into + * @net_dev->dev_addr. */ @@ -318,71 +363,29 @@ { long ioaddr = net_dev->base_addr; - u32 rfcrSave; - u32 i; - - rfcrSave = inl(rfcr + ioaddr); - - outl(rfcrSave | RELOAD, ioaddr + cr); - outl(0, ioaddr + cr); - - /* disable packet filtering before setting filter */ - outl(rfcrSave & ~RFEN, rfcr + ioaddr); - - /* load MAC addr to filter data register */ - for (i = 0 ; i < 3 ; i++) { - outl((i << RFADDR_shift), ioaddr + rfcr); - *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr); - } - - /* enable packet filtering */ - outl(rfcrSave | RFEN, rfcr + ioaddr); - - return 1; -} - -/** - * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model - * @pci_dev: the sis900 pci device - * @net_dev: the net device to get address for - * - * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM - * is shared by - * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first - * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access - * by LAN, otherwise is not. After MAC address is read from EEPROM, send - * EEDONE signal to refuse EEPROM access by LAN. - * The EEPROM map of SiS962 or SiS963 is different to SiS900. - * The signature field in SiS962 or SiS963 spec is meaningless. - * MAC address is read into @net_dev->dev_addr. - */ - -static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev, - struct net_device *net_dev) -{ - long ioaddr = net_dev->base_addr; - long ee_addr = ioaddr + mear; - u32 waittime = 0; - int i; - - outl(EEREQ, ee_addr); - while(waittime < 2000) { - if(inl(ee_addr) & EEGNT) { - - /* get MAC address from EEPROM */ - for (i = 0; i < 3; i++) - ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); - - outl(EEDONE, ee_addr); - return 1; - } else { - udelay(1); - waittime ++; - } - } - outl(EEDONE, ee_addr); - return 0; -} - -/** + u32 rfcrSave; + u32 i; + + + rfcrSave = inl(rfcr + ioaddr); + + outl(rfcrSave | RELOAD, ioaddr + cr); + outl(0, ioaddr + cr); + + /* disable packet filtering before setting filter */ + outl(rfcrSave & ~RFEN, rfcr + ioaddr); + + /* load MAC addr to filter data register */ + for (i = 0 ; i < 3 ; i++) { + outl((i << RFADDR_shift), ioaddr + rfcr); + *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr); + } + + /* enable packet filtering */ + outl(rfcrSave | RFEN, rfcr + ioaddr); + + return 1; +} + +/* * sis900_probe - Probe for sis900 device * @pci_dev: the sis900 pci device @@ -395,7 +398,7 @@ */ -static int __devinit sis900_probe(struct pci_dev *pci_dev, - const struct pci_device_id *pci_id) -{ +static int __devinit sis900_probe (struct pci_dev *pci_dev, const struct pci_device_id *pci_id){ + int i; + int ret; struct sis900_private *sis_priv; struct net_device *net_dev; @@ -404,5 +407,4 @@ void *ring_space; long ioaddr; - int i, ret; const char *card_name = card_names[pci_id->driver_data]; const char *dev_name = pci_name(pci_dev); @@ -414,5 +416,4 @@ printk(version); #endif - /* setup various bits in PCI command register */ ret = pci_enable_device(pci_dev); @@ -425,7 +426,5 @@ return i; } - pci_set_master(pci_dev); - net_dev = alloc_etherdev(sizeof(struct sis900_private)); if (!net_dev) @@ -794,54 +793,59 @@ */ + + static u16 __devinit read_eeprom(long ioaddr, int location) { - int i; - u16 retval = 0; - long ee_addr = ioaddr + mear; - u32 read_cmd = location | EEread; - - outl(0, ee_addr); - eeprom_delay(); - outl(EECS, ee_addr); - eeprom_delay(); - - /* Shift the read command (9) bits out. */ - for (i = 8; i >= 0; i--) { - u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS; - outl(dataval, ee_addr); - eeprom_delay(); - outl(dataval | EECLK, ee_addr); - eeprom_delay(); - } - outl(EECS, ee_addr); - eeprom_delay(); - - /* read the 16-bits data in */ - for (i = 16; i > 0; i--) { - outl(EECS, ee_addr); - eeprom_delay(); - outl(EECS | EECLK, ee_addr); - eeprom_delay(); - retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0); - eeprom_delay(); - } - - /* Terminate the EEPROM access. */ - outl(0, ee_addr); - eeprom_delay(); - - return (retval); -} - -/* Read and write the MII management registers using software-generated + int i; + u16 retval = 0; + long ee_addr = ioaddr + mear; + u32 read_cmd = location | EEread; + + outl(0, ee_addr); + eeprom_delay(); + outl(EECS, ee_addr); + eeprom_delay(); + + /* Shift the read command (9) bits out. */ + for (i = 8; i >= 0; i--) { + u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS; + outl(dataval, ee_addr); + eeprom_delay(); + outl(dataval | EECLK, ee_addr); + eeprom_delay(); + } + outl(EECS, ee_addr); + eeprom_delay(); + + /* read the 16-bits data in */ + for (i = 16; i > 0; i--) { + outl(EECS, ee_addr); + eeprom_delay(); + outl(EECS | EECLK, ee_addr); + eeprom_delay(); + retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0); + eeprom_delay(); + } + + /* Terminate the EEPROM access. */ + outl(0, ee_addr); + eeprom_delay(); + + return (retval); +} + +#define mdio_delay() inl(mdio_addr) + +/* + Read and write the MII management registers using software-generated serial MDIO protocol. Note that the command bits and data bits are - send out separately */ -#define mdio_delay() inl(mdio_addr) + send out separately +*/ static void mdio_idle(long mdio_addr) { - outl(MDIO | MDDIR, mdio_addr); - mdio_delay(); - outl(MDIO | MDDIR | MDC, mdio_addr); + outl(MDIO | MDDIR, mdio_addr); + mdio_delay(); + outl(MDIO | MDDIR | MDC, mdio_addr); } @@ -849,15 +853,14 @@ static void mdio_reset(long mdio_addr) { - int i; - - for (i = 31; i >= 0; i--) { - outl(MDDIR | MDIO, mdio_addr); - mdio_delay(); - outl(MDDIR | MDIO | MDC, mdio_addr); - mdio_delay(); - } - return; -} - + int i; + + for (i = 31; i >= 0; i--) { + outl(MDDIR | MDIO, mdio_addr); + mdio_delay(); + outl(MDDIR | MDIO | MDC, mdio_addr); + mdio_delay(); + } + return; +} /** * mdio_read - read MII PHY register @@ -873,33 +876,31 @@ static int mdio_read(struct net_device *net_dev, int phy_id, int location) { - long mdio_addr = net_dev->base_addr + mear; - int mii_cmd = MIIread|(phy_id<= 0; i--) { - int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; - outl(dataval, mdio_addr); - mdio_delay(); - outl(dataval | MDC, mdio_addr); - mdio_delay(); - } - - /* Read the 16 data bits. */ - for (i = 16; i > 0; i--) { - outl(0, mdio_addr); - mdio_delay(); - retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0); - outl(MDC, mdio_addr); - mdio_delay(); - } - outl(0x00, mdio_addr); - - return retval; -} - + long mdio_addr = net_dev->base_addr + mear; + int mii_cmd = MIIread|(phy_id<= 0; i--) { + int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; + outl(dataval, mdio_addr); + mdio_delay(); + outl(dataval | MDC, mdio_addr); + mdio_delay(); + } + + /* Read the 16 data bits. */ + for (i = 16; i > 0; i--) { + outl(0, mdio_addr); + mdio_delay(); + retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0); + outl(MDC, mdio_addr); + mdio_delay(); + } + outl(0x00, mdio_addr); + return retval; +} /** * mdio_write - write MII PHY register @@ -914,46 +915,98 @@ */ -static void mdio_write(struct net_device *net_dev, int phy_id, int location, - int value) -{ - long mdio_addr = net_dev->base_addr + mear; - int mii_cmd = MIIwrite|(phy_id<= 0; i--) { - int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; - outb(dataval, mdio_addr); - mdio_delay(); - outb(dataval | MDC, mdio_addr); - mdio_delay(); - } - mdio_delay(); - - /* Shift the value bits out. */ - for (i = 15; i >= 0; i--) { - int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR; - outl(dataval, mdio_addr); - mdio_delay(); - outl(dataval | MDC, mdio_addr); - mdio_delay(); - } - mdio_delay(); - - /* Clear out extra bits. */ - for (i = 2; i > 0; i--) { - outb(0, mdio_addr); - mdio_delay(); - outb(MDC, mdio_addr); - mdio_delay(); - } - outl(0x00, mdio_addr); - - return; -} - +static void mdio_write(struct net_device *net_dev, int phy_id, int location, int value) +{ + long mdio_addr = net_dev->base_addr + mear; + int mii_cmd = MIIwrite|(phy_id<= 0; i--) { + int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; + outb(dataval, mdio_addr); + mdio_delay(); + outb(dataval | MDC, mdio_addr); + mdio_delay(); + } + mdio_delay(); + + /* Shift the value bits out. */ + for (i = 15; i >= 0; i--) { + int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR; + outl(dataval, mdio_addr); + mdio_delay(); + outl(dataval | MDC, mdio_addr); + mdio_delay(); + } + mdio_delay(); + + /* Clear out extra bits. */ + for (i = 2; i > 0; i--) { + outb(0, mdio_addr); + mdio_delay(); + outb(MDC, mdio_addr); + mdio_delay(); + } + outl(0x00, mdio_addr); + return; +} + +/* + * sis900_open - open sis900 device + * @net_dev: the net device to open + * + * Do some initialization and start net interface. + * enable interrupts and set sis900 timer. + */ + +static int +sis900_open(struct net_device *net_dev) +{ + struct sis900_private *sis_priv = net_dev->priv; + long ioaddr = net_dev->base_addr; + int ret; + + /* Soft reset the chip. */ + sis900_reset(net_dev); + /* Equalizer workaround Rule */ + sis630_set_eq(net_dev, sis_priv->chipset_rev); + ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED, + net_dev->name, net_dev); + if (ret) + return ret; + + sis900_init_rxfilter(net_dev); + + sis900_init_tx_ring(net_dev); + sis900_init_rx_ring(net_dev); + + set_rx_mode(net_dev); + + netif_start_queue(net_dev); + + /* Workaround for EDB */ + sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); + + /* Enable all known interrupts by setting the interrupt mask. */ + outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr); + outl(RxENA | inl(ioaddr + cr), ioaddr + cr); + outl(IE, ioaddr + ier); + + sis900_check_mode(net_dev, sis_priv->mii); + + /* Set the timer to switch to check for link beat and perhaps switch + to an alternate media type. */ + + init_timer(&sis_priv->timer); + sis_priv->timer.expires = jiffies + HZ; + sis_priv->timer.data = (unsigned long)net_dev; + sis_priv->timer.function = &sis900_timer; + add_timer(&sis_priv->timer); + + return 0; +} /** @@ -994,97 +1047,75 @@ #endif -/** - * sis900_open - open sis900 device - * @net_dev: the net device to open - * - * Do some initialization and start net interface. - * enable interrupts and set sis900 timer. - */ - -static int -sis900_open(struct net_device *net_dev) -{ +/* + * sis900_reset - Reset sis900 MAC + * @net_dev: the net device to reset + * + * reset sis900 MAC and wait until finished + * reset through command register + * change backoff algorithm for 900B0 & 635 M/B + */ + +static void +sis900_reset(struct net_device *net_dev) +{ + int i = 0; + u32 status = TxRCMP | RxRCMP; + struct sis900_private * sis_priv = net_dev->priv; + long ioaddr = net_dev->base_addr; + + outl(0, ioaddr + ier); + outl(0, ioaddr + imr); + outl(0, ioaddr + rfcr); + + outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr); + + /* Check that the chip has finished the reset. */ + while (status && (i++ < 1000)) { + status ^= (inl(isr + ioaddr) & status); + } + + if( (sis_priv->chipset_rev >= SIS635A_900_REV) || (sis_priv->chipset_rev == SIS900B_900_REV) ) + outl(PESEL | RND_CNT, ioaddr + cfg); + else + outl(PESEL, ioaddr + cfg); +} + + +/** + * sis900_init_rxfilter - Initialize the Rx filter + * @net_dev: the net device to initialize for + * + * Set receive filter address to our MAC address + * and enable packet filtering. + */ + +static void +sis900_init_rxfilter (struct net_device * net_dev) +{ + u32 rfcrSave; struct sis900_private *sis_priv = net_dev->priv; long ioaddr = net_dev->base_addr; - int ret; - - /* Soft reset the chip. */ - sis900_reset(net_dev); - - /* Equalizer workaround Rule */ - sis630_set_eq(net_dev, sis_priv->chipset_rev); - - ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED, - net_dev->name, net_dev); - if (ret) - return ret; - - sis900_init_rxfilter(net_dev); - - sis900_init_tx_ring(net_dev); - sis900_init_rx_ring(net_dev); - - set_rx_mode(net_dev); - - netif_start_queue(net_dev); - - /* Workaround for EDB */ - sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); - - /* Enable all known interrupts by setting the interrupt mask. */ - outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr); - outl(RxENA | inl(ioaddr + cr), ioaddr + cr); - outl(IE, ioaddr + ier); - - sis900_check_mode(net_dev, sis_priv->mii); - - /* Set the timer to switch to check for link beat and perhaps switch - to an alternate media type. */ - init_timer(&sis_priv->timer); - sis_priv->timer.expires = jiffies + HZ; - sis_priv->timer.data = (unsigned long)net_dev; - sis_priv->timer.function = &sis900_timer; - add_timer(&sis_priv->timer); - - return 0; -} - -/** - * sis900_init_rxfilter - Initialize the Rx filter - * @net_dev: the net device to initialize for - * - * Set receive filter address to our MAC address - * and enable packet filtering. - */ - -static void -sis900_init_rxfilter (struct net_device * net_dev) -{ - struct sis900_private *sis_priv = net_dev->priv; - long ioaddr = net_dev->base_addr; - u32 rfcrSave; u32 i; - - rfcrSave = inl(rfcr + ioaddr); - - /* disable packet filtering before setting filter */ - outl(rfcrSave & ~RFEN, rfcr + ioaddr); - - /* load MAC addr to filter data register */ - for (i = 0 ; i < 3 ; i++) { - u32 w; - - w = (u32) *((u16 *)(net_dev->dev_addr)+i); - outl((i << RFADDR_shift), ioaddr + rfcr); - outl(w, ioaddr + rfdr); - - if (netif_msg_hw(sis_priv)) { - printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n", - net_dev->name, i, inl(ioaddr + rfdr)); - } - } - - /* enable packet filtering */ - outl(rfcrSave | RFEN, rfcr + ioaddr); + rfcrSave = inl(rfcr + ioaddr); + + /* disable packet filtering before setting filter */ + outl(rfcrSave & ~RFEN, rfcr + ioaddr); + + /* load MAC addr to filter data register */ + for (i = 0 ; i < 3 ; i++) { + u32 w; + + w = (u32) *((u16 *)(net_dev->dev_addr)+i); + outl((i << RFADDR_shift), ioaddr + rfcr); + outl(w, ioaddr + rfdr); + + if (netif_msg_hw(sis_priv)) { + printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n", + net_dev->name, i, inl(ioaddr + rfdr)); + } + } + + /* enable packet filtering */ + outl(rfcrSave | RFEN, rfcr + ioaddr); } @@ -1130,23 +1161,24 @@ */ -static void +static void sis900_init_rx_ring(struct net_device *net_dev) -{ - struct sis900_private *sis_priv = net_dev->priv; - long ioaddr = net_dev->base_addr; - int i; - - sis_priv->cur_rx = 0; - sis_priv->dirty_rx = 0; - - /* init RX descriptor */ - for (i = 0; i < NUM_RX_DESC; i++) { - sis_priv->rx_skbuff[i] = NULL; - +{ + int i; + struct sis900_private *sis_priv = net_dev->priv; + long ioaddr = net_dev->base_addr; + + sis_priv->cur_rx = 0; + sis_priv->dirty_rx = 0; + + /* init RX descriptor */ + for (i = 0; i < NUM_RX_DESC; i++) { + sis_priv->rx_skbuff[i] = NULL; sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma + ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc); sis_priv->rx_ring[i].cmdsts = 0; sis_priv->rx_ring[i].bufptr = 0; - } + + + } /* allocate sock buffers */ @@ -2359,37 +2391,4 @@ } -/** - * sis900_reset - Reset sis900 MAC - * @net_dev: the net device to reset - * - * reset sis900 MAC and wait until finished - * reset through command register - * change backoff algorithm for 900B0 & 635 M/B - */ - -static void sis900_reset(struct net_device *net_dev) -{ - struct sis900_private * sis_priv = net_dev->priv; - long ioaddr = net_dev->base_addr; - int i = 0; - u32 status = TxRCMP | RxRCMP; - - outl(0, ioaddr + ier); - outl(0, ioaddr + imr); - outl(0, ioaddr + rfcr); - - outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr); - - /* Check that the chip has finished the reset. */ - while (status && (i++ < 1000)) { - status ^= (inl(isr + ioaddr) & status); - } - - if( (sis_priv->chipset_rev >= SIS635A_900_REV) || - (sis_priv->chipset_rev == SIS900B_900_REV) ) - outl(PESEL | RND_CNT, ioaddr + cfg); - else - outl(PESEL, ioaddr + cfg); -} /**