Changeset 4


Ignore:
Timestamp:
Feb 18, 2008, 6:09:52 PM (17 years ago)
Author:
wade
Message:
 
File:
1 edited

Legend:

Unmodified
Added
Removed

  • gpxe_study/kernel_2.6.20_src/sis900.c

    r2 r4  
    5454#include <linux/kernel.h>
    5555#include <linux/string.h>
     56#include <linux/errno.h>
    5657#include <linux/timer.h>
    57 #include <linux/errno.h>
    5858#include <linux/ioport.h>
    5959#include <linux/slab.h>
    … …  
    9797/* Time in jiffies before concluding the transmitter is hung. */
    9898#define TX_TIMEOUT  (4*HZ)
    99 
    10099enum {
    101100  SIS_900 = 0,
    … …  
    118117
    119118static const struct mii_chip_info {
    120   const char * name;
    121   u16 phy_id0;
    122   u16 phy_id1;
    123   u8  phy_types;
     119    const char * name;
     120    u16 phy_id0;
     121    u16 phy_id1;
     122    u8  phy_types;
    124123#define HOME  0x0001
    125124#define LAN 0x0002
    … …  
    127126#define UNKNOWN 0x0
    128127} mii_chip_table[] = {
    129   { "SiS 900 Internal MII PHY",     0x001d, 0x8000, LAN },
    130   { "SiS 7014 Physical Layer Solution",   0x0016, 0xf830, LAN },
    131   { "SiS 900 on Foxconn 661 7MI",         0x0143, 0xBC70, LAN },
    132   { "Altimata AC101LF PHY",               0x0022, 0x5520, LAN },
    133   { "ADM 7001 LAN PHY",     0x002e, 0xcc60, LAN },
    134   { "AMD 79C901 10BASE-T PHY",      0x0000, 0x6B70, LAN },
    135   { "AMD 79C901 HomePNA PHY",   0x0000, 0x6B90, HOME},
    136   { "ICS LAN PHY",      0x0015, 0xF440, LAN },
     128    {"SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
     129    {"SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
     130    {"SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
     131    {"AMD 79C901 10BASE-T PHY",  0x0000, 0x6B70, LAN },
     132    {"AMD 79C901 HomePNA PHY",   0x0000, 0x6B90, HOME},
     133    {"ICS LAN PHY", 0x0015, 0xF440, LAN },
     134    {"NS 83851 PHY",0x2000, 0x5C20, MIX },
     135    {"Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
     136    {"VIA 6103 PHY", 0x0101, 0x8f20, LAN },
     137    {"ADM 7001 LAN PHY",      0x002e, 0xcc60, LAN },
    137138  { "ICS LAN PHY",      0x0143, 0xBC70, LAN },
    138   { "NS 83851 PHY",     0x2000, 0x5C20, MIX },
    139139  { "NS 83847 PHY",                       0x2000, 0x5C30, MIX },
    140   { "Realtek RTL8201 PHY",    0x0000, 0x8200, LAN },
    141   { "VIA 6103 PHY",     0x0101, 0x8f20, LAN },
     140    {"Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
    142141  {NULL,},
    143142};
    144143
    145144struct mii_phy {
    146   struct mii_phy * next;
    147   int phy_addr;
    148   u16 phy_id0;
    149   u16 phy_id1;
    150   u16 status;
    151   u8  phy_types;
     145    struct mii_phy * next;
     146    int phy_addr;
     147    u16 phy_id0;
     148    u16 phy_id1;
     149    u16 status;
     150    u8  phy_types;
    152151};
    153152
    … …  
    236235
    237236/**
    238  *  sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
     237 *  sis900_get_mac_addr: - Get MAC address for stand alone SiS900 model
    239238 *  @pci_dev: the sis900 pci device
    240239 *  @net_dev: the net device to get address for
    … …  
    260259  /* get MAC address from EEPROM */
    261260  for (i = 0; i < 3; i++)
    262           ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
    263 
     261      ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
    264262  return 1;
    265263}
    266264
    267265/**
    268  *  sis630e_get_mac_addr - Get MAC address for SiS630E model
     266 *  sis96x_get_mac_addr: - Get MAC address for SiS962 or SiS963 model
     267 *  @pci_dev: the sis900 pci device
     268 *  @net_dev: the net device to get address for
     269 *
     270 *  SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
     271 *  is shared by
     272 *  LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
     273 *  and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
     274 *  by LAN, otherwise is not. After MAC address is read from EEPROM, send
     275 *  EEDONE signal to refuse EEPROM access by LAN.
     276 *  The EEPROM map of SiS962 or SiS963 is different to SiS900.
     277 *  The signature field in SiS962 or SiS963 spec is meaningless.
     278 *  MAC address is read into @net_dev->dev_addr.
     279 */
     280
     281static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
     282          struct net_device *net_dev)
     283{
     284  long ioaddr = net_dev->base_addr;
     285  long ee_addr = ioaddr + mear;
     286  u32 waittime = 0;
     287  int i;
     288
     289  outl(EEREQ, ee_addr);
     290  while(waittime < 2000) {
     291    if(inl(ee_addr) & EEGNT) {
     292
     293      /* get MAC address from EEPROM */
     294      for (i = 0; i < 3; i++)
     295              ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
     296
     297      outl(EEDONE, ee_addr);
     298      return 1;
     299    } else {
     300      udelay(1); 
     301      waittime ++;
     302    }
     303  }
     304  outl(EEDONE, ee_addr);
     305  return 0;
     306}
     307
     308
     309/**
     310 *  sis630e_get_mac_addr: - Get MAC address for SiS630E model
    269311 *  @pci_dev: the sis900 pci device
    270312 *  @net_dev: the net device to get address for
    … …  
    281323  u8 reg;
    282324  int i;
    283 
    284325  isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
    285326  if (!isa_bridge)
    … …  
    290331    return 0;
    291332  }
     333
    292334  pci_read_config_byte(isa_bridge, 0x48, &reg);
    293335  pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
    294336
    295   for (i = 0; i < 6; i++) {
     337  for (i = 0; i < 6; i++)
     338  {
    296339    outb(0x09 + i, 0x70);
    297340    ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
    … …  
    304347
    305348
    306 /**
    307  *  sis635_get_mac_addr - Get MAC address for SIS635 model
    308  *  @pci_dev: the sis900 pci device
    309  *  @net_dev: the net device to get address for
    310  *
    311  *  SiS635 model, set MAC Reload Bit to load Mac address from APC
    312  *  to rfdr. rfdr is accessed through rfcr. MAC address is read into
    313  *  @net_dev->dev_addr.
     349
     350
     351/**
     352 *      sis635_get_mac_addr - Get MAC address for SIS635
     353 *      @pci_dev: the sis900 pci device
     354 *      @net_dev: the net device to get address for
     355 *
     356 *      SiS635 model, set MAC Reload Bit to load Mac address from APC
     357 *      to rfdr. rfdr is accessed through rfcr. MAC address is read into
     358 *      @net_dev->dev_addr.
    314359 */
    315360
    … …  
    318363{
    319364  long ioaddr = net_dev->base_addr;
    320   u32 rfcrSave;
    321   u32 i;
    322 
    323   rfcrSave = inl(rfcr + ioaddr);
    324 
    325   outl(rfcrSave | RELOAD, ioaddr + cr);
    326   outl(0, ioaddr + cr);
    327 
    328   /* disable packet filtering before setting filter */
    329   outl(rfcrSave & ~RFEN, rfcr + ioaddr);
    330 
    331   /* load MAC addr to filter data register */
    332   for (i = 0 ; i < 3 ; i++) {
    333     outl((i << RFADDR_shift), ioaddr + rfcr);
    334     *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
    335   }
    336 
    337   /* enable packet filtering */
    338   outl(rfcrSave | RFEN, rfcr + ioaddr);
    339 
    340   return 1;
    341 }
    342 
    343 /**
    344  *  sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
    345  *  @pci_dev: the sis900 pci device
    346  *  @net_dev: the net device to get address for
    347  *
    348  *  SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
    349  *  is shared by
    350  *  LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
    351  *  and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
    352  *  by LAN, otherwise is not. After MAC address is read from EEPROM, send
    353  *  EEDONE signal to refuse EEPROM access by LAN.
    354  *  The EEPROM map of SiS962 or SiS963 is different to SiS900.
    355  *  The signature field in SiS962 or SiS963 spec is meaningless.
    356  *  MAC address is read into @net_dev->dev_addr.
    357  */
    358 
    359 static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
    360           struct net_device *net_dev)
    361 {
    362   long ioaddr = net_dev->base_addr;
    363   long ee_addr = ioaddr + mear;
    364   u32 waittime = 0;
    365   int i;
    366 
    367   outl(EEREQ, ee_addr);
    368   while(waittime < 2000) {
    369     if(inl(ee_addr) & EEGNT) {
    370 
    371       /* get MAC address from EEPROM */
    372       for (i = 0; i < 3; i++)
    373               ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
    374 
    375       outl(EEDONE, ee_addr);
    376       return 1;
    377     } else {
    378       udelay(1);
    379       waittime ++;
    380     }
    381   }
    382   outl(EEDONE, ee_addr);
    383   return 0;
    384 }
    385 
    386 /**
     365        u32 rfcrSave;
     366        u32 i;
     367 
     368 
     369        rfcrSave = inl(rfcr + ioaddr);
     370
     371        outl(rfcrSave | RELOAD, ioaddr + cr);
     372        outl(0, ioaddr + cr);
     373
     374        /* disable packet filtering before setting filter */
     375        outl(rfcrSave & ~RFEN, rfcr + ioaddr);
     376
     377        /* load MAC addr to filter data register */
     378        for (i = 0 ; i < 3 ; i++) {
     379                outl((i << RFADDR_shift), ioaddr + rfcr);
     380                *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
     381        }
     382
     383        /* enable packet filtering */
     384        outl(rfcrSave | RFEN, rfcr + ioaddr);
     385
     386        return 1;
     387}
     388
     389/*
    387390 *  sis900_probe - Probe for sis900 device
    388391 *  @pci_dev: the sis900 pci device
    … …  
    395398 */
    396399
    397 static int __devinit sis900_probe(struct pci_dev *pci_dev,
    398         const struct pci_device_id *pci_id)
    399 {
     400static int __devinit sis900_probe (struct pci_dev *pci_dev, const struct pci_device_id *pci_id){
     401    int i;
     402    int ret;
    400403  struct sis900_private *sis_priv;
    401404  struct net_device *net_dev;
    … …  
    404407  void *ring_space;
    405408  long ioaddr;
    406   int i, ret;
    407409  const char *card_name = card_names[pci_id->driver_data];
    408410  const char *dev_name = pci_name(pci_dev);
    … …  
    414416    printk(version);
    415417#endif
    416 
    417418  /* setup various bits in PCI command register */
    418419  ret = pci_enable_device(pci_dev);
    … …  
    425426    return i;
    426427  }
    427 
    428428  pci_set_master(pci_dev);
    429 
    430429  net_dev = alloc_etherdev(sizeof(struct sis900_private));
    431430  if (!net_dev)
    … …  
    794793 */
    795794
     795
     796
    796797static u16 __devinit read_eeprom(long ioaddr, int location)
    797798{
    798   int i;
    799   u16 retval = 0;
    800   long ee_addr = ioaddr + mear;
    801   u32 read_cmd = location | EEread;
    802 
    803   outl(0, ee_addr);
    804   eeprom_delay();
    805   outl(EECS, ee_addr);
    806   eeprom_delay();
    807 
    808   /* Shift the read command (9) bits out. */
    809   for (i = 8; i >= 0; i--) {
    810     u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
    811     outl(dataval, ee_addr);
    812     eeprom_delay();
    813     outl(dataval | EECLK, ee_addr);
    814     eeprom_delay();
    815   }
    816   outl(EECS, ee_addr);
    817   eeprom_delay();
    818 
    819   /* read the 16-bits data in */
    820   for (i = 16; i > 0; i--) {
    821     outl(EECS, ee_addr);
    822     eeprom_delay();
    823     outl(EECS | EECLK, ee_addr);
    824     eeprom_delay();
    825     retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
    826     eeprom_delay();
    827   }
    828 
    829   /* Terminate the EEPROM access. */
    830   outl(0, ee_addr);
    831   eeprom_delay();
    832 
    833   return (retval);
    834 }
    835 
    836 /* Read and write the MII management registers using software-generated
     799    int i;
     800    u16 retval = 0;
     801    long ee_addr = ioaddr + mear;
     802    u32 read_cmd = location | EEread;
     803
     804    outl(0, ee_addr);
     805    eeprom_delay();
     806    outl(EECS, ee_addr);
     807    eeprom_delay();
     808
     809    /* Shift the read command (9) bits out. */
     810    for (i = 8; i >= 0; i--) {
     811        u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
     812        outl(dataval, ee_addr);
     813        eeprom_delay();
     814        outl(dataval | EECLK, ee_addr);
     815        eeprom_delay();
     816    }
     817    outl(EECS, ee_addr);
     818    eeprom_delay();
     819
     820    /* read the 16-bits data in */
     821    for (i = 16; i > 0; i--) {
     822        outl(EECS, ee_addr);
     823        eeprom_delay();
     824        outl(EECS | EECLK, ee_addr);
     825        eeprom_delay();
     826        retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
     827        eeprom_delay();
     828    }
     829               
     830    /* Terminate the EEPROM access. */
     831    outl(0, ee_addr);
     832    eeprom_delay();
     833
     834    return (retval);
     835}
     836
     837#define mdio_delay()    inl(mdio_addr)
     838
     839/*
     840   Read and write the MII management registers using software-generated
    837841   serial MDIO protocol. Note that the command bits and data bits are
    838    send out separately */
    839 #define mdio_delay()    inl(mdio_addr)
     842   send out separately
     843*/
    840844
    841845static void mdio_idle(long mdio_addr)
    842846{
    843   outl(MDIO | MDDIR, mdio_addr);
    844   mdio_delay();
    845   outl(MDIO | MDDIR | MDC, mdio_addr);
     847    outl(MDIO | MDDIR, mdio_addr);
     848    mdio_delay();
     849    outl(MDIO | MDDIR | MDC, mdio_addr);
    846850}
    847851
    … …  
    849853static void mdio_reset(long mdio_addr)
    850854{
    851   int i;
    852 
    853   for (i = 31; i >= 0; i--) {
    854     outl(MDDIR | MDIO, mdio_addr);
    855     mdio_delay();
    856     outl(MDDIR | MDIO | MDC, mdio_addr);
    857     mdio_delay();
    858   }
    859   return;
    860 }
    861 
     855    int i;
     856
     857    for (i = 31; i >= 0; i--) {
     858        outl(MDDIR | MDIO, mdio_addr);
     859        mdio_delay();
     860        outl(MDDIR | MDIO | MDC, mdio_addr);
     861        mdio_delay();
     862    }
     863    return;
     864}
    862865/**
    863866 *  mdio_read - read MII PHY register
    … …  
    873876static int mdio_read(struct net_device *net_dev, int phy_id, int location)
    874877{
    875   long mdio_addr = net_dev->base_addr + mear;
    876   int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
    877   u16 retval = 0;
    878   int i;
    879 
    880   mdio_reset(mdio_addr);
    881   mdio_idle(mdio_addr);
    882 
    883   for (i = 15; i >= 0; i--) {
    884     int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
    885     outl(dataval, mdio_addr);
    886     mdio_delay();
    887     outl(dataval | MDC, mdio_addr);
    888     mdio_delay();
    889   }
    890 
    891   /* Read the 16 data bits. */
    892   for (i = 16; i > 0; i--) {
    893     outl(0, mdio_addr);
    894     mdio_delay();
    895     retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
    896     outl(MDC, mdio_addr);
    897     mdio_delay();
    898   }
    899   outl(0x00, mdio_addr);
    900 
    901   return retval;
    902 }
    903 
     878    long mdio_addr = net_dev->base_addr + mear;
     879    int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
     880    u16 retval = 0;
     881    int i;
     882
     883    mdio_reset(mdio_addr);
     884    mdio_idle(mdio_addr);
     885
     886    for (i = 15; i >= 0; i--) {
     887        int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
     888        outl(dataval, mdio_addr);
     889        mdio_delay();
     890        outl(dataval | MDC, mdio_addr);
     891        mdio_delay();
     892    }
     893
     894    /* Read the 16 data bits. */
     895    for (i = 16; i > 0; i--) {
     896        outl(0, mdio_addr);
     897        mdio_delay();
     898        retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
     899        outl(MDC, mdio_addr);
     900        mdio_delay();
     901    }
     902    outl(0x00, mdio_addr);
     903    return retval;
     904}
    904905/**
    905906 *  mdio_write - write MII PHY register
    … …  
    914915 */
    915916
    916 static void mdio_write(struct net_device *net_dev, int phy_id, int location,
    917       int value)
    918 {
    919   long mdio_addr = net_dev->base_addr + mear;
    920   int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
    921   int i;
    922 
    923   mdio_reset(mdio_addr);
    924   mdio_idle(mdio_addr);
    925 
    926   /* Shift the command bits out. */
    927   for (i = 15; i >= 0; i--) {
    928     int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
    929     outb(dataval, mdio_addr);
    930     mdio_delay();
    931     outb(dataval | MDC, mdio_addr);
    932     mdio_delay();
    933   }
    934   mdio_delay();
    935 
    936   /* Shift the value bits out. */
    937   for (i = 15; i >= 0; i--) {
    938     int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
    939     outl(dataval, mdio_addr);
    940     mdio_delay();
    941     outl(dataval | MDC, mdio_addr);
    942     mdio_delay();
    943   }
    944   mdio_delay();
    945 
    946   /* Clear out extra bits. */
    947   for (i = 2; i > 0; i--) {
    948     outb(0, mdio_addr);
    949     mdio_delay();
    950     outb(MDC, mdio_addr);
    951     mdio_delay();
    952   }
    953   outl(0x00, mdio_addr);
    954 
    955   return;
    956 }
    957 
     917static void mdio_write(struct net_device *net_dev, int phy_id, int location, int value)
     918{
     919    long mdio_addr = net_dev->base_addr + mear;
     920    int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
     921    int i;
     922
     923    mdio_reset(mdio_addr);
     924    mdio_idle(mdio_addr);
     925
     926    /* Shift the command bits out. */
     927    for (i = 15; i >= 0; i--) {
     928        int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
     929        outb(dataval, mdio_addr);
     930        mdio_delay();
     931        outb(dataval | MDC, mdio_addr);
     932        mdio_delay();
     933    }
     934    mdio_delay();
     935
     936    /* Shift the value bits out. */
     937    for (i = 15; i >= 0; i--) {
     938        int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
     939        outl(dataval, mdio_addr);
     940        mdio_delay();
     941        outl(dataval | MDC, mdio_addr);
     942        mdio_delay();
     943    }
     944    mdio_delay();
     945       
     946    /* Clear out extra bits. */
     947    for (i = 2; i > 0; i--) {
     948        outb(0, mdio_addr);
     949        mdio_delay();
     950        outb(MDC, mdio_addr);
     951        mdio_delay();
     952    }
     953    outl(0x00, mdio_addr);
     954    return;
     955}
     956
     957/*
     958 *  sis900_open - open sis900 device
     959 *  @net_dev: the net device to open
     960 *
     961 *  Do some initialization and start net interface.
     962 *  enable interrupts and set sis900 timer.
     963 */
     964
     965static int
     966sis900_open(struct net_device *net_dev)
     967{
     968    struct sis900_private *sis_priv = net_dev->priv;
     969    long ioaddr = net_dev->base_addr;
     970    int ret;
     971 
     972    /* Soft reset the chip. */
     973    sis900_reset(net_dev);
     974    /* Equalizer workaround Rule */
     975    sis630_set_eq(net_dev, sis_priv->chipset_rev);
     976    ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED,
     977            net_dev->name, net_dev);
     978    if (ret)
     979        return ret;
     980
     981    sis900_init_rxfilter(net_dev);
     982
     983    sis900_init_tx_ring(net_dev);
     984    sis900_init_rx_ring(net_dev);
     985
     986    set_rx_mode(net_dev);
     987
     988    netif_start_queue(net_dev);
     989
     990    /* Workaround for EDB */
     991    sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
     992
     993    /* Enable all known interrupts by setting the interrupt mask. */
     994    outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
     995    outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
     996    outl(IE, ioaddr + ier);
     997
     998    sis900_check_mode(net_dev, sis_priv->mii);
     999
     1000    /* Set the timer to switch to check for link beat and perhaps switch
     1001       to an alternate media type. */
     1002
     1003    init_timer(&sis_priv->timer);
     1004    sis_priv->timer.expires = jiffies + HZ;
     1005    sis_priv->timer.data = (unsigned long)net_dev;
     1006    sis_priv->timer.function = &sis900_timer;
     1007    add_timer(&sis_priv->timer);
     1008
     1009    return 0;
     1010}
    9581011
    9591012/**
    … …  
    9941047#endif
    9951048
    996 /**
    997  *  sis900_open - open sis900 device
    998  *  @net_dev: the net device to open
    999  *
    1000  *  Do some initialization and start net interface.
    1001  *  enable interrupts and set sis900 timer.
    1002  */
    1003 
    1004 static int
    1005 sis900_open(struct net_device *net_dev)
    1006 {
     1049/*
     1050 *  sis900_reset - Reset sis900 MAC
     1051 *  @net_dev: the net device to reset
     1052 *
     1053 *  reset sis900 MAC and wait until finished
     1054 *  reset through command register
     1055 *  change backoff algorithm for 900B0 & 635 M/B
     1056 */
     1057
     1058static void
     1059sis900_reset(struct net_device *net_dev)
     1060{
     1061    int i = 0;
     1062    u32 status = TxRCMP | RxRCMP;
     1063    struct sis900_private * sis_priv = net_dev->priv;
     1064    long ioaddr = net_dev->base_addr;
     1065
     1066    outl(0, ioaddr + ier);
     1067    outl(0, ioaddr + imr);
     1068    outl(0, ioaddr + rfcr);
     1069
     1070    outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
     1071
     1072    /* Check that the chip has finished the reset. */
     1073    while (status && (i++ < 1000)) {
     1074        status ^= (inl(isr + ioaddr) & status);
     1075    }
     1076
     1077    if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||            (sis_priv->chipset_rev == SIS900B_900_REV) )
     1078            outl(PESEL | RND_CNT, ioaddr + cfg);
     1079    else
     1080            outl(PESEL, ioaddr + cfg);
     1081}
     1082
     1083
     1084/**
     1085 *  sis900_init_rxfilter - Initialize the Rx filter
     1086 *  @net_dev: the net device to initialize for
     1087 *
     1088 *  Set receive filter address to our MAC address
     1089 *  and enable packet filtering.
     1090 */
     1091
     1092static void
     1093sis900_init_rxfilter (struct net_device * net_dev)
     1094{
     1095    u32 rfcrSave;
    10071096  struct sis900_private *sis_priv = net_dev->priv;
    10081097  long ioaddr = net_dev->base_addr;
    1009   int ret;
    1010 
    1011   /* Soft reset the chip. */
    1012   sis900_reset(net_dev);
    1013 
    1014   /* Equalizer workaround Rule */
    1015   sis630_set_eq(net_dev, sis_priv->chipset_rev);
    1016 
    1017   ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED,
    1018             net_dev->name, net_dev);
    1019   if (ret)
    1020     return ret;
    1021 
    1022   sis900_init_rxfilter(net_dev);
    1023 
    1024   sis900_init_tx_ring(net_dev);
    1025   sis900_init_rx_ring(net_dev);
    1026 
    1027   set_rx_mode(net_dev);
    1028 
    1029   netif_start_queue(net_dev);
    1030 
    1031   /* Workaround for EDB */
    1032   sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
    1033 
    1034   /* Enable all known interrupts by setting the interrupt mask. */
    1035   outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
    1036   outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
    1037   outl(IE, ioaddr + ier);
    1038 
    1039   sis900_check_mode(net_dev, sis_priv->mii);
    1040 
    1041   /* Set the timer to switch to check for link beat and perhaps switch
    1042      to an alternate media type. */
    1043   init_timer(&sis_priv->timer);
    1044   sis_priv->timer.expires = jiffies + HZ;
    1045   sis_priv->timer.data = (unsigned long)net_dev;
    1046   sis_priv->timer.function = &sis900_timer;
    1047   add_timer(&sis_priv->timer);
    1048 
    1049   return 0;
    1050 }
    1051 
    1052 /**
    1053  *  sis900_init_rxfilter - Initialize the Rx filter
    1054  *  @net_dev: the net device to initialize for
    1055  *
    1056  *  Set receive filter address to our MAC address
    1057  *  and enable packet filtering.
    1058  */
    1059 
    1060 static void
    1061 sis900_init_rxfilter (struct net_device * net_dev)
    1062 {
    1063   struct sis900_private *sis_priv = net_dev->priv;
    1064   long ioaddr = net_dev->base_addr;
    1065   u32 rfcrSave;
    10661098  u32 i;
    1067 
    1068   rfcrSave = inl(rfcr + ioaddr);
    1069 
    1070   /* disable packet filtering before setting filter */
    1071   outl(rfcrSave & ~RFEN, rfcr + ioaddr);
    1072 
    1073   /* load MAC addr to filter data register */
    1074   for (i = 0 ; i < 3 ; i++) {
    1075     u32 w;
    1076 
    1077     w = (u32) *((u16 *)(net_dev->dev_addr)+i);
    1078     outl((i << RFADDR_shift), ioaddr + rfcr);
    1079     outl(w, ioaddr + rfdr);
    1080 
    1081     if (netif_msg_hw(sis_priv)) {
    1082       printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
    1083              net_dev->name, i, inl(ioaddr + rfdr));
    1084     }
    1085   }
    1086 
    1087   /* enable packet filtering */
    1088   outl(rfcrSave | RFEN, rfcr + ioaddr);
     1099    rfcrSave = inl(rfcr + ioaddr);
     1100
     1101    /* disable packet filtering before setting filter */
     1102    outl(rfcrSave & ~RFEN, rfcr + ioaddr);
     1103
     1104    /* load MAC addr to filter data register */
     1105    for (i = 0 ; i < 3 ; i++) {
     1106        u32 w;
     1107
     1108        w = (u32) *((u16 *)(net_dev->dev_addr)+i);
     1109        outl((i << RFADDR_shift), ioaddr + rfcr);
     1110        outl(w, ioaddr + rfdr);
     1111
     1112        if (netif_msg_hw(sis_priv)) {
     1113            printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
     1114                  net_dev->name, i, inl(ioaddr + rfdr));
     1115        }
     1116    }
     1117
     1118    /* enable packet filtering */
     1119    outl(rfcrSave | RFEN, rfcr + ioaddr);
    10891120}
    10901121
    … …  
    11301161 */
    11311162
    1132 static void
     1163static void 
    11331164sis900_init_rx_ring(struct net_device *net_dev)
    1134 {
    1135   struct sis900_private *sis_priv = net_dev->priv;
    1136   long ioaddr = net_dev->base_addr;
    1137   int i;
    1138 
    1139   sis_priv->cur_rx = 0;
    1140   sis_priv->dirty_rx = 0;
    1141 
    1142   /* init RX descriptor */
    1143   for (i = 0; i < NUM_RX_DESC; i++) {
    1144     sis_priv->rx_skbuff[i] = NULL;
    1145 
     1165{
     1166    int i;
     1167    struct sis900_private *sis_priv = net_dev->priv;
     1168    long ioaddr = net_dev->base_addr;
     1169
     1170    sis_priv->cur_rx = 0;
     1171    sis_priv->dirty_rx = 0;
     1172
     1173    /* init RX descriptor */
     1174    for (i = 0; i < NUM_RX_DESC; i++) {
     1175  sis_priv->rx_skbuff[i] = NULL;
    11461176    sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
    11471177      ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
    11481178    sis_priv->rx_ring[i].cmdsts = 0;
    11491179    sis_priv->rx_ring[i].bufptr = 0;
    1150   }
     1180
     1181
     1182    }
    11511183
    11521184  /* allocate sock buffers */
    … …  
    23592391}
    23602392
    2361 /**
    2362  *  sis900_reset - Reset sis900 MAC
    2363  *  @net_dev: the net device to reset
    2364  *
    2365  *  reset sis900 MAC and wait until finished
    2366  *  reset through command register
    2367  *  change backoff algorithm for 900B0 & 635 M/B
    2368  */
    2369 
    2370 static void sis900_reset(struct net_device *net_dev)
    2371 {
    2372   struct sis900_private * sis_priv = net_dev->priv;
    2373   long ioaddr = net_dev->base_addr;
    2374   int i = 0;
    2375   u32 status = TxRCMP | RxRCMP;
    2376 
    2377   outl(0, ioaddr + ier);
    2378   outl(0, ioaddr + imr);
    2379   outl(0, ioaddr + rfcr);
    2380 
    2381   outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
    2382 
    2383   /* Check that the chip has finished the reset. */
    2384   while (status && (i++ < 1000)) {
    2385     status ^= (inl(isr + ioaddr) & status);
    2386   }
    2387 
    2388   if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||
    2389       (sis_priv->chipset_rev == SIS900B_900_REV) )
    2390     outl(PESEL | RND_CNT, ioaddr + cfg);
    2391   else
    2392     outl(PESEL, ioaddr + cfg);
    2393 }
    23942393
    23952394/**
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