source: gpxe_study/kernel_2.6.20_src/sis900.c @ 129

Last change on this file since 129 was 6, checked in by wade, 17 years ago

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1/* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2   Copyright 1999 Silicon Integrated System Corporation
3   Revision:  1.08.10 Apr. 2 2006
4
5   Modified from the driver which is originally written by Donald Becker.
6
7   This software may be used and distributed according to the terms
8   of the GNU General Public License (GPL), incorporated herein by reference.
9   Drivers based on this skeleton fall under the GPL and must retain
10   the authorship (implicit copyright) notice.
11
12   References:
13   SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14   preliminary Rev. 1.0 Jan. 14, 1998
15   SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16   preliminary Rev. 1.0 Nov. 10, 1998
17   SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18   preliminary Rev. 1.0 Jan. 18, 1998
19
20   Rev 1.08.10 Apr.  2 2006 Daniele Venzano add vlan (jumbo packets) support
21   Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
22   Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
23   Rev 1.08.07 Nov.  2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support
24   Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
25   Rev 1.08.05 Jun.  6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
26   Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
27   Rev 1.08.03 Feb.  1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
28   Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29   Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30   Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31   Rev 1.07.11 Apr.  2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
32   Rev 1.07.10 Mar.  1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
33   Rev 1.07.09 Feb.  9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
34   Rev 1.07.08 Jan.  8 2001 Lei-Chun Chang added RTL8201 PHY support
35   Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
36   Rev 1.07.06 Nov.  7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
37   Rev 1.07.05 Nov.  6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
38   Rev 1.07.04 Sep.  6 2000 Lei-Chun Chang added ICS1893 PHY support
39   Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
40   Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
41   Rev 1.07    Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
42   Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
43   Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
44   Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
45   Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
46   Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
47   Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
48   Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
49   Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
50*/
51
52#include <linux/module.h>
53#include <linux/moduleparam.h>
54#include <linux/kernel.h>
55#include <linux/string.h>
56#include <linux/errno.h>
57#include <linux/timer.h>
58#include <linux/ioport.h>
59#include <linux/slab.h>
60#include <linux/interrupt.h>
61#include <linux/pci.h>
62#include <linux/netdevice.h>
63#include <linux/init.h>
64#include <linux/mii.h>
65#include <linux/etherdevice.h>
66#include <linux/skbuff.h>
67#include <linux/delay.h>
68#include <linux/ethtool.h>
69#include <linux/crc32.h>
70#include <linux/bitops.h>
71#include <linux/dma-mapping.h>
72
73#include <asm/processor.h>      /* Processor type for cache alignment. */
74#include <asm/io.h>
75#include <asm/irq.h>
76#include <asm/uaccess.h>  /* User space memory access functions */
77
78#include "sis900.h"
79
80#define SIS900_MODULE_NAME "sis900"
81#define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
82
83static char version[] __devinitdata =
84KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
85
86static int max_interrupt_work = 40;
87static int multicast_filter_limit = 128;
88
89static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
90
91#define SIS900_DEF_MSG \
92  (NETIF_MSG_DRV    | \
93   NETIF_MSG_LINK   | \
94   NETIF_MSG_RX_ERR | \
95   NETIF_MSG_TX_ERR)
96
97/* Time in jiffies before concluding the transmitter is hung. */
98#define TX_TIMEOUT  (4*HZ)
99enum {
100  SIS_900 = 0,
101  SIS_7016
102};
103static const char * card_names[] = {
104  "SiS 900 PCI Fast Ethernet",
105  "SiS 7016 PCI Fast Ethernet"
106};
107static struct pci_device_id sis900_pci_tbl [] = {
108  {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
109   PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
110  {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
111   PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
112  {0,}
113};
114MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
115
116static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
117
118static const struct mii_chip_info {
119    const char * name;
120    u16 phy_id0;
121    u16 phy_id1;
122    u8  phy_types;
123#define HOME  0x0001
124#define LAN 0x0002
125#define MIX 0x0003
126#define UNKNOWN 0x0
127} mii_chip_table[] = {
128    {"SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
129    {"SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
130    {"SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
131    {"AMD 79C901 10BASE-T PHY",  0x0000, 0x6B70, LAN },
132    {"AMD 79C901 HomePNA PHY",   0x0000, 0x6B90, HOME},
133    {"ICS LAN PHY", 0x0015, 0xF440, LAN },
134    {"NS 83851 PHY",0x2000, 0x5C20, MIX },
135    {"Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
136    {"VIA 6103 PHY", 0x0101, 0x8f20, LAN },
137    {"ADM 7001 LAN PHY",      0x002e, 0xcc60, LAN },
138  { "ICS LAN PHY",      0x0143, 0xBC70, LAN },
139  { "NS 83847 PHY",                       0x2000, 0x5C30, MIX },
140    {"Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
141  {NULL,},
142};
143
144struct mii_phy {
145    struct mii_phy * next;
146    int phy_addr;
147    u16 phy_id0;
148    u16 phy_id1;
149    u16 status;
150    u8  phy_types;
151};
152
153typedef struct _BufferDesc {
154  u32 link;
155  u32 cmdsts;
156  u32 bufptr;
157} BufferDesc;
158
159struct sis900_private {
160  struct net_device_stats stats;
161  struct pci_dev * pci_dev;
162
163  spinlock_t lock;
164
165  struct mii_phy * mii;
166  struct mii_phy * first_mii; /* record the first mii structure */
167  unsigned int cur_phy;
168  struct mii_if_info mii_info;
169
170  struct timer_list timer; /* Link status detection timer. */
171  u8 autong_complete; /* 1: auto-negotiate complete  */
172
173  u32 msg_enable;
174
175  unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
176  unsigned int cur_tx, dirty_tx;
177
178  /* The saved address of a sent/receive-in-place packet buffer */
179  struct sk_buff *tx_skbuff[NUM_TX_DESC];
180  struct sk_buff *rx_skbuff[NUM_RX_DESC];
181  BufferDesc *tx_ring;
182  BufferDesc *rx_ring;
183
184  dma_addr_t tx_ring_dma;
185  dma_addr_t rx_ring_dma;
186
187  unsigned int tx_full; /* The Tx queue is full. */
188  u8 host_bridge_rev;
189  u8 chipset_rev;
190};
191
192MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
193MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
194MODULE_LICENSE("GPL");
195
196module_param(multicast_filter_limit, int, 0444);
197module_param(max_interrupt_work, int, 0444);
198module_param(sis900_debug, int, 0444);
199MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
200MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
201MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
202
203#ifdef CONFIG_NET_POLL_CONTROLLER
204static void sis900_poll(struct net_device *dev);
205#endif
206static int sis900_open(struct net_device *net_dev);
207static int sis900_mii_probe (struct net_device * net_dev);
208static void sis900_init_rxfilter (struct net_device * net_dev);
209static u16 read_eeprom(long ioaddr, int location);
210static int mdio_read(struct net_device *net_dev, int phy_id, int location);
211static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
212static void sis900_timer(unsigned long data);
213static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
214static void sis900_tx_timeout(struct net_device *net_dev);
215static void sis900_init_tx_ring(struct net_device *net_dev);
216static void sis900_init_rx_ring(struct net_device *net_dev);
217static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
218static int sis900_rx(struct net_device *net_dev);
219static void sis900_finish_xmit (struct net_device *net_dev);
220static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
221static int sis900_close(struct net_device *net_dev);
222static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
223static struct net_device_stats *sis900_get_stats(struct net_device *net_dev);
224static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
225static void set_rx_mode(struct net_device *net_dev);
226static void sis900_reset(struct net_device *net_dev);
227static void sis630_set_eq(struct net_device *net_dev, u8 revision);
228static int sis900_set_config(struct net_device *dev, struct ifmap *map);
229static u16 sis900_default_phy(struct net_device * net_dev);
230static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
231static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
232static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
233static void sis900_set_mode (long ioaddr, int speed, int duplex);
234static const struct ethtool_ops sis900_ethtool_ops;
235
236/**
237 *  sis900_get_mac_addr: - Get MAC address for stand alone SiS900 model
238 *  @pci_dev: the sis900 pci device
239 *  @net_dev: the net device to get address for
240 *
241 *  Older SiS900 and friends, use EEPROM to store MAC address.
242 *  MAC address is read from read_eeprom() into @net_dev->dev_addr.
243 */
244
245static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
246{
247  long ioaddr = pci_resource_start(pci_dev, 0);
248  u16 signature;
249  int i;
250
251  /* check to see if we have sane EEPROM */
252  signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
253  if (signature == 0xffff || signature == 0x0000) {
254    printk (KERN_WARNING "%s: Error EERPOM read %x\n",
255      pci_name(pci_dev), signature);
256    return 0;
257  }
258
259  /* get MAC address from EEPROM */
260  for (i = 0; i < 3; i++)
261      ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
262  return 1;
263}
264
265/**
266 *  sis96x_get_mac_addr: - Get MAC address for SiS962 or SiS963 model
267 *  @pci_dev: the sis900 pci device
268 *  @net_dev: the net device to get address for
269 *
270 *  SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
271 *  is shared by
272 *  LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
273 *  and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
274 *  by LAN, otherwise is not. After MAC address is read from EEPROM, send
275 *  EEDONE signal to refuse EEPROM access by LAN.
276 *  The EEPROM map of SiS962 or SiS963 is different to SiS900.
277 *  The signature field in SiS962 or SiS963 spec is meaningless.
278 *  MAC address is read into @net_dev->dev_addr.
279 */
280
281static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
282          struct net_device *net_dev)
283{
284  long ioaddr = net_dev->base_addr;
285  long ee_addr = ioaddr + mear;
286  u32 waittime = 0;
287  int i;
288
289  outl(EEREQ, ee_addr);
290  while(waittime < 2000) {
291    if(inl(ee_addr) & EEGNT) {
292
293      /* get MAC address from EEPROM */
294      for (i = 0; i < 3; i++)
295              ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
296
297      outl(EEDONE, ee_addr);
298      return 1;
299    } else {
300      udelay(1); 
301      waittime ++;
302    }
303  }
304  outl(EEDONE, ee_addr);
305  return 0;
306}
307
308
309/**
310 *  sis630e_get_mac_addr: - Get MAC address for SiS630E model
311 *  @pci_dev: the sis900 pci device
312 *  @net_dev: the net device to get address for
313 *
314 *  SiS630E model, use APC CMOS RAM to store MAC address.
315 *  APC CMOS RAM is accessed through ISA bridge.
316 *  MAC address is read into @net_dev->dev_addr.
317 */
318
319static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
320          struct net_device *net_dev)
321{
322  struct pci_dev *isa_bridge = NULL;
323  u8 reg;
324  int i;
325  isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
326  if (!isa_bridge)
327    isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
328  if (!isa_bridge) {
329    printk(KERN_WARNING "%s: Can not find ISA bridge\n",
330           pci_name(pci_dev));
331    return 0;
332  }
333
334  pci_read_config_byte(isa_bridge, 0x48, &reg);
335  pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
336
337  for (i = 0; i < 6; i++)
338  {
339    outb(0x09 + i, 0x70);
340    ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
341  }
342  pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
343  pci_dev_put(isa_bridge);
344
345  return 1;
346}
347
348
349
350
351/**
352 *      sis635_get_mac_addr - Get MAC address for SIS635
353 *      @pci_dev: the sis900 pci device
354 *      @net_dev: the net device to get address for
355 *
356 *      SiS635 model, set MAC Reload Bit to load Mac address from APC
357 *      to rfdr. rfdr is accessed through rfcr. MAC address is read into
358 *      @net_dev->dev_addr.
359 */
360
361static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
362          struct net_device *net_dev)
363{
364  long ioaddr = net_dev->base_addr;
365        u32 rfcrSave;
366        u32 i;
367 
368 
369        rfcrSave = inl(rfcr + ioaddr);
370
371        outl(rfcrSave | RELOAD, ioaddr + cr);
372        outl(0, ioaddr + cr);
373
374        /* disable packet filtering before setting filter */
375        outl(rfcrSave & ~RFEN, rfcr + ioaddr);
376
377        /* load MAC addr to filter data register */
378        for (i = 0 ; i < 3 ; i++) {
379                outl((i << RFADDR_shift), ioaddr + rfcr);
380                *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
381        }
382
383        /* enable packet filtering */
384        outl(rfcrSave | RFEN, rfcr + ioaddr);
385
386        return 1;
387}
388
389/*
390 *  sis900_probe - Probe for sis900 device
391 *  @pci_dev: the sis900 pci device
392 *  @pci_id: the pci device ID
393 *
394 *  Check and probe sis900 net device for @pci_dev.
395 *  Get mac address according to the chip revision,
396 *  and assign SiS900-specific entries in the device structure.
397 *  ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
398 */
399
400static int __devinit sis900_probe (struct pci_dev *pci_dev, const struct pci_device_id *pci_id){
401    int i;
402    int ret;
403  struct sis900_private *sis_priv;
404  struct net_device *net_dev;
405  struct pci_dev *dev;
406  dma_addr_t ring_dma;
407  void *ring_space;
408  long ioaddr;
409  const char *card_name = card_names[pci_id->driver_data];
410  const char *dev_name = pci_name(pci_dev);
411
412/* when built into the kernel, we only print version if device is found */
413#ifndef MODULE
414  static int printed_version;
415  if (!printed_version++)
416    printk(version);
417#endif
418  /* setup various bits in PCI command register */
419  ret = pci_enable_device(pci_dev);
420  if(ret) return ret;
421
422  i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK);
423  if(i){
424    printk(KERN_ERR "sis900.c: architecture does not support"
425      "32bit PCI busmaster DMA\n");
426    return i;
427  }
428  pci_set_master(pci_dev);
429  net_dev = alloc_etherdev(sizeof(struct sis900_private));
430  if (!net_dev)
431    return -ENOMEM;
432  SET_MODULE_OWNER(net_dev);
433  SET_NETDEV_DEV(net_dev, &pci_dev->dev);
434
435  /* We do a request_region() to register /proc/ioports info. */
436  ioaddr = pci_resource_start(pci_dev, 0);
437  ret = pci_request_regions(pci_dev, "sis900");
438  if (ret)
439    goto err_out;
440
441  sis_priv = net_dev->priv;
442  net_dev->base_addr = ioaddr;
443  net_dev->irq = pci_dev->irq;
444  sis_priv->pci_dev = pci_dev;
445  spin_lock_init(&sis_priv->lock);
446
447  pci_set_drvdata(pci_dev, net_dev);
448
449  ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
450  if (!ring_space) {
451    ret = -ENOMEM;
452    goto err_out_cleardev;
453  }
454  sis_priv->tx_ring = (BufferDesc *)ring_space;
455  sis_priv->tx_ring_dma = ring_dma;
456
457  ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
458  if (!ring_space) {
459    ret = -ENOMEM;
460    goto err_unmap_tx;
461  }
462  sis_priv->rx_ring = (BufferDesc *)ring_space;
463  sis_priv->rx_ring_dma = ring_dma;
464
465  /* The SiS900-specific entries in the device structure. */
466  net_dev->open = &sis900_open;
467  net_dev->hard_start_xmit = &sis900_start_xmit;
468  net_dev->stop = &sis900_close;
469  net_dev->get_stats = &sis900_get_stats;
470  net_dev->set_config = &sis900_set_config;
471  net_dev->set_multicast_list = &set_rx_mode;
472  net_dev->do_ioctl = &mii_ioctl;
473  net_dev->tx_timeout = sis900_tx_timeout;
474  net_dev->watchdog_timeo = TX_TIMEOUT;
475  net_dev->ethtool_ops = &sis900_ethtool_ops;
476
477#ifdef CONFIG_NET_POLL_CONTROLLER
478        net_dev->poll_controller = &sis900_poll;
479#endif
480
481  if (sis900_debug > 0)
482    sis_priv->msg_enable = sis900_debug;
483  else
484    sis_priv->msg_enable = SIS900_DEF_MSG;
485
486  sis_priv->mii_info.dev = net_dev;
487  sis_priv->mii_info.mdio_read = mdio_read;
488  sis_priv->mii_info.mdio_write = mdio_write;
489  sis_priv->mii_info.phy_id_mask = 0x1f;
490  sis_priv->mii_info.reg_num_mask = 0x1f;
491
492    /* Get Mac address according to the chip revision */
493    pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
494    if(netif_msg_probe(sis_priv))
495        printk(KERN_DEBUG "%s: detected revision %2.2x, "
496                "trying to get MAC address...\n",
497                dev_name, sis_priv->chipset_rev);
498
499    ret = 0;
500
501    if (sis_priv->chipset_rev == SIS630E_900_REV)
502        ret = sis630e_get_mac_addr(pci_dev, net_dev);
503    else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
504        ret = sis635_get_mac_addr(pci_dev, net_dev);
505    else if (sis_priv->chipset_rev == SIS96x_900_REV)
506  ret = sis96x_get_mac_addr(pci_dev, net_dev);
507    else
508        ret = sis900_get_mac_addr(pci_dev, net_dev);
509
510    if (ret == 0)
511    {
512        printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name);
513        ret = -ENODEV;
514        goto err_unmap_rx;
515    }
516
517    /* 630ET : set the mii access mode as software-mode */
518    if (sis_priv->chipset_rev == SIS630ET_900_REV)
519  outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
520
521
522    /* probe for mii transceiver */
523    if (sis900_mii_probe(net_dev) == 0) {
524    printk(KERN_WARNING "%s: Error probing MII device.\n",
525           dev_name);
526    ret = -ENODEV;
527    goto err_unmap_rx;
528  }
529
530  /* save our host bridge revision */
531  dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
532  if (dev) {
533    pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
534    pci_dev_put(dev);
535  }
536
537  ret = register_netdev(net_dev);
538  if (ret)
539    goto err_unmap_rx;
540
541  /* print some information about our NIC */
542  printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
543         card_name, ioaddr, net_dev->irq);
544  for (i = 0; i < 5; i++)
545    printk("%2.2x:", (u8)net_dev->dev_addr[i]);
546  printk("%2.2x.\n", net_dev->dev_addr[i]);
547
548  /* Detect Wake on Lan support */
549  ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27;
550  if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
551    printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
552
553  return 0;
554
555 err_unmap_rx:
556  pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
557    sis_priv->rx_ring_dma);
558 err_unmap_tx:
559  pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
560    sis_priv->tx_ring_dma);
561 err_out_cleardev:
562  pci_set_drvdata(pci_dev, NULL);
563  pci_release_regions(pci_dev);
564 err_out:
565  free_netdev(net_dev);
566  return ret;
567}
568
569/**
570 *  sis900_mii_probe - Probe MII PHY for sis900
571 *  @net_dev: the net device to probe for
572 *
573 *  Search for total of 32 possible mii phy addresses.
574 *  Identify and set current phy if found one,
575 *  return error if it failed to found.
576 */
577
578static int __init sis900_mii_probe(struct net_device * net_dev)
579{
580  struct sis900_private * sis_priv = net_dev->priv;
581  const char *dev_name = pci_name(sis_priv->pci_dev);
582  u16 poll_bit = MII_STAT_LINK, status = 0;
583  unsigned long timeout = jiffies + 5 * HZ;
584  int phy_addr;
585
586  sis_priv->mii = NULL;
587
588  /* search for total of 32 possible mii phy addresses */
589  for (phy_addr = 0; phy_addr < 32; phy_addr++) {
590    struct mii_phy * mii_phy = NULL;
591    u16 mii_status;
592    int i;
593
594    mii_phy = NULL;
595    for(i = 0; i < 2; i++)
596      mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
597
598    if (mii_status == 0xffff || mii_status == 0x0000) {
599      if (netif_msg_probe(sis_priv))
600        printk(KERN_DEBUG "%s: MII at address %d"
601            " not accessible\n",
602            dev_name, phy_addr);
603      continue;
604    }
605
606    if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
607      printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n");
608      mii_phy = sis_priv->first_mii;
609      while (mii_phy) {
610        struct mii_phy *phy;
611        phy = mii_phy;
612        mii_phy = mii_phy->next;
613        kfree(phy);
614      }
615      return 0;
616    }
617
618    mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
619    mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
620    mii_phy->phy_addr = phy_addr;
621    mii_phy->status = mii_status;
622    mii_phy->next = sis_priv->mii;
623    sis_priv->mii = mii_phy;
624    sis_priv->first_mii = mii_phy;
625
626    for (i = 0; mii_chip_table[i].phy_id1; i++)
627      if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
628          ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
629        mii_phy->phy_types = mii_chip_table[i].phy_types;
630        if (mii_chip_table[i].phy_types == MIX)
631          mii_phy->phy_types =
632              (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
633        printk(KERN_INFO "%s: %s transceiver found "
634              "at address %d.\n",
635              dev_name,
636              mii_chip_table[i].name,
637              phy_addr);
638        break;
639      }
640
641    if( !mii_chip_table[i].phy_id1 ) {
642      printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
643             dev_name, phy_addr);
644      mii_phy->phy_types = UNKNOWN;
645    }
646  }
647
648  if (sis_priv->mii == NULL) {
649    printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
650    return 0;
651  }
652
653  /* select default PHY for mac */
654  sis_priv->mii = NULL;
655  sis900_default_phy( net_dev );
656
657  /* Reset phy if default phy is internal sis900 */
658        if ((sis_priv->mii->phy_id0 == 0x001D) &&
659      ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
660          status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
661
662        /* workaround for ICS1893 PHY */
663        if ((sis_priv->mii->phy_id0 == 0x0015) &&
664            ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
665              mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
666
667  if(status & MII_STAT_LINK){
668    while (poll_bit) {
669      yield();
670
671      poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
672      if (time_after_eq(jiffies, timeout)) {
673        printk(KERN_WARNING "%s: reset phy and link down now\n",
674               dev_name);
675        return -ETIME;
676      }
677    }
678  }
679
680  if (sis_priv->chipset_rev == SIS630E_900_REV) {
681    /* SiS 630E has some bugs on default value of PHY registers */
682    mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
683    mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
684    mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
685    mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
686    //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
687  }
688
689  if (sis_priv->mii->status & MII_STAT_LINK)
690    netif_carrier_on(net_dev);
691  else
692    netif_carrier_off(net_dev);
693
694  return 1;
695}
696
697/**
698 *  sis900_default_phy - Select default PHY for sis900 mac.
699 *  @net_dev: the net device to probe for
700 *
701 *  Select first detected PHY with link as default.
702 *  If no one is link on, select PHY whose types is HOME as default.
703 *  If HOME doesn't exist, select LAN.
704 */
705
706static u16 sis900_default_phy(struct net_device * net_dev)
707{
708  struct sis900_private * sis_priv = net_dev->priv;
709  struct mii_phy *phy = NULL, *phy_home = NULL,
710    *default_phy = NULL, *phy_lan = NULL;
711  u16 status;
712
713        for (phy=sis_priv->first_mii; phy; phy=phy->next) {
714    status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
715    status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
716
717    /* Link ON & Not select default PHY & not ghost PHY */
718     if ((status & MII_STAT_LINK) && !default_phy &&
719          (phy->phy_types != UNKNOWN))
720      default_phy = phy;
721     else {
722      status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
723      mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
724        status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
725      if (phy->phy_types == HOME)
726        phy_home = phy;
727      else if(phy->phy_types == LAN)
728        phy_lan = phy;
729     }
730  }
731
732  if (!default_phy && phy_home)
733    default_phy = phy_home;
734  else if (!default_phy && phy_lan)
735    default_phy = phy_lan;
736  else if (!default_phy)
737    default_phy = sis_priv->first_mii;
738
739  if (sis_priv->mii != default_phy) {
740    sis_priv->mii = default_phy;
741    sis_priv->cur_phy = default_phy->phy_addr;
742    printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
743           pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
744  }
745
746  sis_priv->mii_info.phy_id = sis_priv->cur_phy;
747
748  status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
749  status &= (~MII_CNTL_ISOLATE);
750
751  mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
752  status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
753  status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
754
755  return status;
756}
757
758
759/**
760 *  sis900_set_capability - set the media capability of network adapter.
761 *  @net_dev : the net device to probe for
762 *  @phy : default PHY
763 *
764 *  Set the media capability of network adapter according to
765 *  mii status register. It's necessary before auto-negotiate.
766 */
767
768static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
769{
770  u16 cap;
771  u16 status;
772
773  status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
774  status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
775
776  cap = MII_NWAY_CSMA_CD |
777    ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
778    ((phy->status & MII_STAT_CAN_TX)    ? MII_NWAY_TX:0) |
779    ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
780    ((phy->status & MII_STAT_CAN_T)     ? MII_NWAY_T:0);
781
782  mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
783}
784
785
786/* Delay between EEPROM clock transitions. */
787#define eeprom_delay()  inl(ee_addr)
788
789/**
790 *  read_eeprom - Read Serial EEPROM
791 *  @ioaddr: base i/o address
792 *  @location: the EEPROM location to read
793 *
794 *  Read Serial EEPROM through EEPROM Access Register.
795 *  Note that location is in word (16 bits) unit
796 */
797
798
799
800static u16 __devinit read_eeprom(long ioaddr, int location)
801{
802    int i;
803    u16 retval = 0;
804    long ee_addr = ioaddr + mear;
805    u32 read_cmd = location | EEread;
806
807    outl(0, ee_addr);
808    eeprom_delay();
809    outl(EECS, ee_addr);
810    eeprom_delay();
811
812    /* Shift the read command (9) bits out. */
813    for (i = 8; i >= 0; i--) {
814        u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
815        outl(dataval, ee_addr);
816        eeprom_delay();
817        outl(dataval | EECLK, ee_addr);
818        eeprom_delay();
819    }
820    outl(EECS, ee_addr);
821    eeprom_delay();
822
823    /* read the 16-bits data in */
824    for (i = 16; i > 0; i--) {
825        outl(EECS, ee_addr);
826        eeprom_delay();
827        outl(EECS | EECLK, ee_addr);
828        eeprom_delay();
829        retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
830        eeprom_delay();
831    }
832               
833    /* Terminate the EEPROM access. */
834    outl(0, ee_addr);
835    eeprom_delay();
836
837    return (retval);
838}
839
840#define mdio_delay()    inl(mdio_addr)
841
842/*
843   Read and write the MII management registers using software-generated
844   serial MDIO protocol. Note that the command bits and data bits are
845   send out separately
846*/
847
848static void mdio_idle(long mdio_addr)
849{
850    outl(MDIO | MDDIR, mdio_addr);
851    mdio_delay();
852    outl(MDIO | MDDIR | MDC, mdio_addr);
853}
854
855/* Syncronize the MII management interface by shifting 32 one bits out. */
856static void mdio_reset(long mdio_addr)
857{
858    int i;
859
860    for (i = 31; i >= 0; i--) {
861        outl(MDDIR | MDIO, mdio_addr);
862        mdio_delay();
863        outl(MDDIR | MDIO | MDC, mdio_addr);
864        mdio_delay();
865    }
866    return;
867}
868/**
869 *  mdio_read - read MII PHY register
870 *  @net_dev: the net device to read
871 *  @phy_id: the phy address to read
872 *  @location: the phy regiester id to read
873 *
874 *  Read MII registers through MDIO and MDC
875 *  using MDIO management frame structure and protocol(defined by ISO/IEC).
876 *  Please see SiS7014 or ICS spec
877 */
878
879static int mdio_read(struct net_device *net_dev, int phy_id, int location)
880{
881    long mdio_addr = net_dev->base_addr + mear;
882    int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
883    u16 retval = 0;
884    int i;
885
886    mdio_reset(mdio_addr);
887    mdio_idle(mdio_addr);
888
889    for (i = 15; i >= 0; i--) {
890        int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
891        outl(dataval, mdio_addr);
892        mdio_delay();
893        outl(dataval | MDC, mdio_addr);
894        mdio_delay();
895    }
896
897    /* Read the 16 data bits. */
898    for (i = 16; i > 0; i--) {
899        outl(0, mdio_addr);
900        mdio_delay();
901        retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
902        outl(MDC, mdio_addr);
903        mdio_delay();
904    }
905    outl(0x00, mdio_addr);
906    return retval;
907}
908/**
909 *  mdio_write - write MII PHY register
910 *  @net_dev: the net device to write
911 *  @phy_id: the phy address to write
912 *  @location: the phy regiester id to write
913 *  @value: the register value to write with
914 *
915 *  Write MII registers with @value through MDIO and MDC
916 *  using MDIO management frame structure and protocol(defined by ISO/IEC)
917 *  please see SiS7014 or ICS spec
918 */
919
920static void mdio_write(struct net_device *net_dev, int phy_id, int location, int value)
921{
922    long mdio_addr = net_dev->base_addr + mear;
923    int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
924    int i;
925
926    mdio_reset(mdio_addr);
927    mdio_idle(mdio_addr);
928
929    /* Shift the command bits out. */
930    for (i = 15; i >= 0; i--) {
931        int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
932        outb(dataval, mdio_addr);
933        mdio_delay();
934        outb(dataval | MDC, mdio_addr);
935        mdio_delay();
936    }
937    mdio_delay();
938
939    /* Shift the value bits out. */
940    for (i = 15; i >= 0; i--) {
941        int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
942        outl(dataval, mdio_addr);
943        mdio_delay();
944        outl(dataval | MDC, mdio_addr);
945        mdio_delay();
946    }
947    mdio_delay();
948       
949    /* Clear out extra bits. */
950    for (i = 2; i > 0; i--) {
951        outb(0, mdio_addr);
952        mdio_delay();
953        outb(MDC, mdio_addr);
954        mdio_delay();
955    }
956    outl(0x00, mdio_addr);
957    return;
958}
959
960/*
961 *  sis900_open - open sis900 device
962 *  @net_dev: the net device to open
963 *
964 *  Do some initialization and start net interface.
965 *  enable interrupts and set sis900 timer.
966 */
967
968static int
969sis900_open(struct net_device *net_dev)
970{
971    struct sis900_private *sis_priv = net_dev->priv;
972    long ioaddr = net_dev->base_addr;
973    int ret;
974 
975    /* Soft reset the chip. */
976    sis900_reset(net_dev);
977    /* Equalizer workaround Rule */
978    sis630_set_eq(net_dev, sis_priv->chipset_rev);
979    ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED, net_dev->name, net_dev);
980    if (ret)
981        return ret;
982
983
984    sis900_init_rxfilter(net_dev);
985
986    sis900_init_tx_ring(net_dev);
987    sis900_init_rx_ring(net_dev);
988
989    set_rx_mode(net_dev);
990
991    netif_start_queue(net_dev);
992
993    /* Workaround for EDB */
994    sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
995
996    /* Enable all known interrupts by setting the interrupt mask. */
997    outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
998    outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
999    outl(IE, ioaddr + ier);
1000
1001    sis900_check_mode(net_dev, sis_priv->mii);
1002
1003    /* Set the timer to switch to check for link beat and perhaps switch
1004       to an alternate media type. */
1005
1006    init_timer(&sis_priv->timer);
1007    sis_priv->timer.expires = jiffies + HZ;
1008    sis_priv->timer.data = (unsigned long)net_dev;
1009    sis_priv->timer.function = &sis900_timer;
1010    add_timer(&sis_priv->timer);
1011
1012    return 0;
1013}
1014
1015/**
1016 *  sis900_reset_phy - reset sis900 mii phy.
1017 *  @net_dev: the net device to write
1018 *  @phy_addr: default phy address
1019 *
1020 *  Some specific phy can't work properly without reset.
1021 *  This function will be called during initialization and
1022 *  link status change from ON to DOWN.
1023 */
1024
1025static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
1026{
1027  int i = 0;
1028  u16 status;
1029
1030  while (i++ < 2)
1031    status = mdio_read(net_dev, phy_addr, MII_STATUS);
1032
1033  mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
1034
1035  return status;
1036}
1037
1038#ifdef CONFIG_NET_POLL_CONTROLLER
1039/*
1040 * Polling 'interrupt' - used by things like netconsole to send skbs
1041 * without having to re-enable interrupts. It's not called while
1042 * the interrupt routine is executing.
1043*/
1044static void sis900_poll(struct net_device *dev)
1045{
1046  disable_irq(dev->irq);
1047  sis900_interrupt(dev->irq, dev);
1048  enable_irq(dev->irq);
1049}
1050#endif
1051
1052/*
1053 *  sis900_reset - Reset sis900 MAC
1054 *  @net_dev: the net device to reset
1055 *
1056 *  reset sis900 MAC and wait until finished
1057 *  reset through command register
1058 *  change backoff algorithm for 900B0 & 635 M/B
1059 */
1060
1061static void 
1062sis900_reset(struct net_device *net_dev)
1063{
1064    int i = 0;
1065    u32 status = TxRCMP | RxRCMP;
1066    struct sis900_private * sis_priv = net_dev->priv;
1067    long ioaddr = net_dev->base_addr;
1068
1069    outl(0, ioaddr + ier);
1070    outl(0, ioaddr + imr);
1071    outl(0, ioaddr + rfcr);
1072
1073    outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
1074
1075    /* Check that the chip has finished the reset. */
1076    while (status && (i++ < 1000)) {
1077        status ^= (inl(isr + ioaddr) & status);
1078    }
1079
1080    if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||            (sis_priv->chipset_rev == SIS900B_900_REV) )
1081            outl(PESEL | RND_CNT, ioaddr + cfg);
1082    else
1083            outl(PESEL, ioaddr + cfg);
1084}
1085
1086
1087/**
1088 *  sis900_init_rxfilter - Initialize the Rx filter
1089 *  @net_dev: the net device to initialize for
1090 *
1091 *  Set receive filter address to our MAC address
1092 *  and enable packet filtering.
1093 */
1094
1095static void
1096sis900_init_rxfilter (struct net_device * net_dev)
1097{
1098    u32 rfcrSave;
1099    struct sis900_private *sis_priv = net_dev->priv;
1100    long ioaddr = net_dev->base_addr;
1101    u32 i;
1102    rfcrSave = inl(rfcr + ioaddr);
1103
1104    /* disable packet filtering before setting filter */
1105    outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1106
1107    /* load MAC addr to filter data register */
1108    for (i = 0 ; i < 3 ; i++) {
1109        u32 w;
1110
1111        w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1112        outl((i << RFADDR_shift), ioaddr + rfcr);
1113        outl(w, ioaddr + rfdr);
1114
1115        if (netif_msg_hw(sis_priv)) {
1116            printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1117                  net_dev->name, i, inl(ioaddr + rfdr));
1118        }
1119    }
1120
1121    /* enable packet filtering */
1122    outl(rfcrSave | RFEN, rfcr + ioaddr);
1123}
1124
1125/**
1126 *  sis900_init_tx_ring - Initialize the Tx descriptor ring
1127 *  @net_dev: the net device to initialize for
1128 *
1129 *  Initialize the Tx descriptor ring,
1130 */
1131
1132static void
1133sis900_init_tx_ring(struct net_device *net_dev)
1134{
1135    struct sis900_private *sis_priv = net_dev->priv;
1136    long ioaddr = net_dev->base_addr;
1137    int i;
1138    sis_priv->tx_full = 0;
1139    sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1140    for (i = 0; i < NUM_TX_DESC; i++) {
1141        sis_priv->tx_skbuff[i] = NULL;
1142  sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1143    ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1144  sis_priv->tx_ring[i].cmdsts = 0;
1145    sis_priv->tx_ring[i].bufptr = 0;
1146    }
1147
1148    /* load Transmit Descriptor Register */
1149    outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1150    if (netif_msg_hw(sis_priv))
1151        printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1152              net_dev->name, inl(ioaddr + txdp));
1153}
1154
1155/**
1156 *  sis900_init_rx_ring - Initialize the Rx descriptor ring
1157 *  @net_dev: the net device to initialize for
1158 *
1159 *  Initialize the Rx descriptor ring,
1160 *  and pre-allocate recevie buffers (socket buffer)
1161 */
1162
1163static void 
1164sis900_init_rx_ring(struct net_device *net_dev)
1165{ 
1166    int i;
1167    struct sis900_private *sis_priv = net_dev->priv;
1168    long ioaddr = net_dev->base_addr;
1169
1170    sis_priv->cur_rx = 0;
1171    sis_priv->dirty_rx = 0;
1172
1173    /* init RX descriptor */
1174    for (i = 0; i < NUM_RX_DESC; i++) {
1175  sis_priv->rx_skbuff[i] = NULL;
1176    sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1177      ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1178    sis_priv->rx_ring[i].cmdsts = 0;
1179    sis_priv->rx_ring[i].bufptr = 0;
1180
1181
1182    }
1183
1184  /* allocate sock buffers */
1185  for (i = 0; i < NUM_RX_DESC; i++) {
1186    struct sk_buff *skb;
1187
1188    if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1189      /* not enough memory for skbuff, this makes a "hole"
1190         on the buffer ring, it is not clear how the
1191         hardware will react to this kind of degenerated
1192         buffer */
1193      break;
1194    }
1195    skb->dev = net_dev;
1196    sis_priv->rx_skbuff[i] = skb;
1197    sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1198                sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1199                        skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1200  }
1201  sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1202
1203  /* load Receive Descriptor Register */
1204  outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1205  if (netif_msg_hw(sis_priv))
1206    printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1207           net_dev->name, inl(ioaddr + rxdp));
1208}
1209
1210/**
1211 *  set_rx_mode - Set SiS900 receive mode
1212 *  @net_dev: the net device to be set
1213 *
1214 *  Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
1215 *  And set the appropriate multicast filter.
1216 *  Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
1217 */
1218
1219static void set_rx_mode(struct net_device *net_dev)
1220{
1221    int i, table_entries;
1222    u32 rx_mode; 
1223    long ioaddr = net_dev->base_addr;
1224    struct sis900_private * sis_priv = net_dev->priv;
1225    u16 mc_filter[16] = {0};  /* 256/128 bits multicast hash table */
1226    /* 635 Hash Table entries = 256(2^16) */
1227     
1228    if((sis_priv->chipset_rev >= SIS635A_900_REV) || (sis_priv->chipset_rev == SIS900B_900_REV))
1229  table_entries = 16;
1230    else
1231  table_entries = 8;
1232    if (net_dev->flags & IFF_PROMISC) {
1233    /* Accept any kinds of packets */
1234        rx_mode = RFPromiscuous;
1235        for (i = 0; i < table_entries; i++)
1236      mc_filter[i] = 0xffff;
1237    } else if ((net_dev->mc_count > multicast_filter_limit) || (net_dev->flags & IFF_ALLMULTI)) {
1238
1239    /* too many multicast addresses or accept all multicast packet */
1240    rx_mode = RFAAB | RFAAM;
1241    for (i = 0; i < table_entries; i++)
1242    mc_filter[i] = 0xffff;
1243         
1244    } else {
1245  /* Accept Broadcast packet, destination address matchs our
1246   * MAC address, use Receive Filter to reject unwanted MCAST
1247   * packets */
1248  struct dev_mc_list *mclist;
1249  rx_mode = RFAAB;
1250  for (i = 0, mclist = net_dev->mc_list;
1251    mclist && i < net_dev->mc_count;
1252    i++, mclist = mclist->next) {
1253    unsigned int bit_nr = sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev);
1254    mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
1255        }
1256    }
1257    /* update Multicast Hash Table in Receive Filter */
1258    for (i = 0; i < table_entries; i++) {
1259        /* why plus 0x04 ??, That makes the correct value for hash table. */
1260        outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
1261        outl(mc_filter[i], ioaddr + rfdr);
1262    }
1263
1264    outl(RFEN | rx_mode, ioaddr + rfcr);
1265
1266    /* sis900 is capable of looping back packets at MAC level for
1267     * debugging purpose */
1268    if (net_dev->flags & IFF_LOOPBACK) {
1269  u32 cr_saved;
1270  /* We must disable Tx/Rx before setting loopback mode */
1271  cr_saved = inl(ioaddr + cr);
1272  outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
1273  /* enable loopback */
1274  outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
1275  outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
1276  /* restore cr */
1277  outl(cr_saved, ioaddr + cr);
1278    }
1279
1280    return;
1281}
1282
1283
1284/* Function: sis900_check_mode
1285 *
1286 * - check the media mode for sis900
1287 *  @net_dev: the net device to be checked
1288 *  @mii_phy: the mii phy
1289 *
1290 *  Older driver gets the media mode from mii status output
1291 *  register. Now we set our media capability and auto-negotiate
1292 *  to get the upper bound of speed and duplex between two ends.
1293 *  If the types of mii phy is HOME, it doesn't need to auto-negotiate
1294 *  and autong_complete should be set to 1.
1295 * Returns:   void.
1296 */
1297
1298static void
1299sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1300{
1301    int speed, duplex;
1302    struct sis900_private *sis_priv = net_dev->priv;
1303    long ioaddr = net_dev->base_addr;
1304
1305  if (mii_phy->phy_types == LAN) {
1306    outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1307    sis900_set_capability(net_dev , mii_phy);
1308    sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1309  } else {
1310    outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1311    speed = HW_SPEED_HOME;
1312    duplex = FDX_CAPABLE_HALF_SELECTED;
1313    sis900_set_mode(ioaddr, speed, duplex);
1314    sis_priv->autong_complete = 1;
1315  }
1316}
1317
1318/**
1319 *  sis630_set_eq - set phy equalizer value for 630 LAN
1320 *  @net_dev: the net device to set equalizer value
1321 *  @revision: 630 LAN revision number
1322 *
1323 *  630E equalizer workaround rule(Cyrus Huang 08/15)
1324 *  PHY register 14h(Test)
1325 *  Bit 14: 0 -- Automatically dectect (default)
1326 *    1 -- Manually set Equalizer filter
1327 *  Bit 13: 0 -- (Default)
1328 *    1 -- Speed up convergence of equalizer setting
1329 *  Bit 9 : 0 -- (Default)
1330 *    1 -- Disable Baseline Wander
1331 *  Bit 3~7   -- Equalizer filter setting
1332 *  Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1333 *  Then calculate equalizer value
1334 *  Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1335 *  Link Off:Set Bit 13 to 1, Bit 14 to 0
1336 *  Calculate Equalizer value:
1337 *  When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value.
1338 *  When the equalizer is stable, this value is not a fixed value. It will be within
1339 *  a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1340 *  0 <= max <= 4  --> set equalizer to max
1341 *  5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1342 *  max >= 15      --> set equalizer to max+5 or set equalizer to max+6 if max == min
1343 */
1344
1345static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1346{
1347  struct sis900_private *sis_priv = net_dev->priv;
1348  u16 reg14h, eq_value=0, max_value=0, min_value=0;
1349  int i, maxcount=10;
1350
1351  if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1352         revision == SIS630A_900_REV || revision ==  SIS630ET_900_REV) )
1353    return;
1354
1355  if (netif_carrier_ok(net_dev)) {
1356    reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1357    mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1358          (0x2200 | reg14h) & 0xBFFF);
1359    for (i=0; i < maxcount; i++) {
1360      eq_value = (0x00F8 & mdio_read(net_dev,
1361          sis_priv->cur_phy, MII_RESV)) >> 3;
1362      if (i == 0)
1363        max_value=min_value=eq_value;
1364      max_value = (eq_value > max_value) ?
1365            eq_value : max_value;
1366      min_value = (eq_value < min_value) ?
1367            eq_value : min_value;
1368    }
1369    /* 630E rule to determine the equalizer value */
1370    if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1371        revision == SIS630ET_900_REV) {
1372      if (max_value < 5)
1373        eq_value = max_value;
1374      else if (max_value >= 5 && max_value < 15)
1375        eq_value = (max_value == min_value) ?
1376            max_value+2 : max_value+1;
1377      else if (max_value >= 15)
1378        eq_value=(max_value == min_value) ?
1379            max_value+6 : max_value+5;
1380    }
1381    /* 630B0&B1 rule to determine the equalizer value */
1382    if (revision == SIS630A_900_REV &&
1383        (sis_priv->host_bridge_rev == SIS630B0 ||
1384         sis_priv->host_bridge_rev == SIS630B1)) {
1385      if (max_value == 0)
1386        eq_value = 3;
1387      else
1388        eq_value = (max_value + min_value + 1)/2;
1389    }
1390    /* write equalizer value and setting */
1391    reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1392    reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1393    reg14h = (reg14h | 0x6000) & 0xFDFF;
1394    mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1395  } else {
1396    reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1397    if (revision == SIS630A_900_REV &&
1398        (sis_priv->host_bridge_rev == SIS630B0 ||
1399         sis_priv->host_bridge_rev == SIS630B1))
1400      mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1401            (reg14h | 0x2200) & 0xBFFF);
1402    else
1403      mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1404            (reg14h | 0x2000) & 0xBFFF);
1405  }
1406  return;
1407}
1408
1409
1410
1411
1412
1413/*
1414 *  sis900_read_mode - read media mode for sis900 internal phy
1415 *  @net_dev: the net device to read mode for
1416 *  @speed  : the transmit speed to be determined
1417 *  @duplex : the duplex mode to be determined
1418 *
1419 *  The capability of remote end will be put in mii register autorec
1420 *  after auto-negotiation. Use AND operation to get the upper bound
1421 *  of speed and duplex between two ends.
1422 */
1423
1424static void
1425sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1426{
1427    int i = 0;
1428    u32 status;
1429    struct sis900_private *sis_priv = net_dev->priv;
1430    struct mii_phy *phy = sis_priv->mii;
1431    int phy_addr = sis_priv->cur_phy;
1432    u16 autoadv, autorec;
1433
1434    while (i++ < 2)
1435        status = mdio_read(net_dev, phy_addr, MII_STATUS);
1436
1437    if (!(status & MII_STAT_LINK))
1438        return;
1439    /* AutoNegotiate completed */
1440    autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1441    autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1442    status = autoadv & autorec;
1443    *speed = HW_SPEED_10_MBPS;
1444    *duplex = FDX_CAPABLE_HALF_SELECTED;
1445   
1446    if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1447  *speed = HW_SPEED_100_MBPS;
1448    if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1449  *duplex = FDX_CAPABLE_FULL_SELECTED;
1450  sis_priv->autong_complete = 1;
1451
1452    /* Workaround for Realtek RTL8201 PHY issue */
1453    if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1454        if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1455            *duplex = FDX_CAPABLE_FULL_SELECTED;
1456        if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1457            *speed = HW_SPEED_100_MBPS;
1458    }
1459
1460    if(netif_msg_link(sis_priv))
1461        printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1462            net_dev->name,
1463               *speed == HW_SPEED_100_MBPS ? 
1464               "100mbps" : "10mbps",
1465               *duplex == FDX_CAPABLE_FULL_SELECTED ?
1466               "full" : "half");
1467}
1468
1469
1470
1471/**
1472 *  sis900_read_mode - read media mode for sis900 internal phy
1473 *  @net_dev: the net device to read mode for
1474 *  @speed  : the transmit speed to be determined
1475 *  @duplex : the duplex mode to be determined
1476 *
1477 *  The capability of remote end will be put in mii register autorec
1478 *  after auto-negotiation. Use AND operation to get the upper bound
1479 *  of speed and duplex between two ends.
1480 */
1481
1482static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1483{
1484  struct sis900_private *sis_priv = net_dev->priv;
1485  struct mii_phy *phy = sis_priv->mii;
1486  int phy_addr = sis_priv->cur_phy;
1487  u32 status;
1488  u16 autoadv, autorec;
1489  int i = 0;
1490
1491  while (i++ < 2)
1492    status = mdio_read(net_dev, phy_addr, MII_STATUS);
1493
1494  if (!(status & MII_STAT_LINK))
1495    return;
1496
1497  /* AutoNegotiate completed */
1498  autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1499  autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1500  status = autoadv & autorec;
1501
1502  *speed = HW_SPEED_10_MBPS;
1503  *duplex = FDX_CAPABLE_HALF_SELECTED;
1504
1505  if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1506    *speed = HW_SPEED_100_MBPS;
1507  if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1508    *duplex = FDX_CAPABLE_FULL_SELECTED;
1509
1510  sis_priv->autong_complete = 1;
1511
1512  /* Workaround for Realtek RTL8201 PHY issue */
1513  if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1514    if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1515      *duplex = FDX_CAPABLE_FULL_SELECTED;
1516    if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1517      *speed = HW_SPEED_100_MBPS;
1518  }
1519
1520  if(netif_msg_link(sis_priv))
1521    printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1522                net_dev->name,
1523                *speed == HW_SPEED_100_MBPS ?
1524                  "100mbps" : "10mbps",
1525                *duplex == FDX_CAPABLE_FULL_SELECTED ?
1526                  "full" : "half");
1527}
1528
1529/**
1530 *  sis900_timer - sis900 timer routine
1531 *  @data: pointer to sis900 net device
1532 *
1533 *  On each timer ticks we check two things,
1534 *  link status (ON/OFF) and link mode (10/100/Full/Half)
1535 */
1536
1537static void sis900_timer(unsigned long data)
1538{
1539  struct net_device *net_dev = (struct net_device *)data;
1540  struct sis900_private *sis_priv = net_dev->priv;
1541  struct mii_phy *mii_phy = sis_priv->mii;
1542  static const int next_tick = 5*HZ;
1543  u16 status;
1544
1545  if (!sis_priv->autong_complete){
1546    int speed, duplex = 0;
1547
1548    sis900_read_mode(net_dev, &speed, &duplex);
1549    if (duplex){
1550      sis900_set_mode(net_dev->base_addr, speed, duplex);
1551      sis630_set_eq(net_dev, sis_priv->chipset_rev);
1552      netif_start_queue(net_dev);
1553    }
1554
1555    sis_priv->timer.expires = jiffies + HZ;
1556    add_timer(&sis_priv->timer);
1557    return;
1558  }
1559
1560  status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1561  status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1562
1563  /* Link OFF -> ON */
1564  if (!netif_carrier_ok(net_dev)) {
1565  LookForLink:
1566    /* Search for new PHY */
1567    status = sis900_default_phy(net_dev);
1568    mii_phy = sis_priv->mii;
1569
1570    if (status & MII_STAT_LINK){
1571      sis900_check_mode(net_dev, mii_phy);
1572      netif_carrier_on(net_dev);
1573    }
1574  } else {
1575  /* Link ON -> OFF */
1576                if (!(status & MII_STAT_LINK)){
1577                  netif_carrier_off(net_dev);
1578      if(netif_msg_link(sis_priv))
1579                    printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1580
1581                  /* Change mode issue */
1582                  if ((mii_phy->phy_id0 == 0x001D) &&
1583          ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1584                    sis900_reset_phy(net_dev,  sis_priv->cur_phy);
1585
1586      sis630_set_eq(net_dev, sis_priv->chipset_rev);
1587
1588                  goto LookForLink;
1589                }
1590  }
1591
1592  sis_priv->timer.expires = jiffies + next_tick;
1593  add_timer(&sis_priv->timer);
1594}
1595
1596
1597/**
1598 *  sis900_set_mode - Set the media mode of mac register.
1599 *  @ioaddr: the address of the device
1600 *  @speed : the transmit speed to be determined
1601 *  @duplex: the duplex mode to be determined
1602 *
1603 *  Set the media mode of mac register txcfg/rxcfg according to
1604 *  speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1605 *  bus is used instead of PCI bus. When this bit is set 1, the
1606 *  Max DMA Burst Size for TX/RX DMA should be no larger than 16
1607 *  double words.
1608 */
1609
1610static void sis900_set_mode (long ioaddr, int speed, int duplex)
1611{
1612  u32 tx_flags = 0, rx_flags = 0;
1613
1614  if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1615    tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1616          (TX_FILL_THRESH << TxFILLT_shift);
1617    rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1618  } else {
1619    tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1620          (TX_FILL_THRESH << TxFILLT_shift);
1621    rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1622  }
1623
1624  if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1625    rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1626    tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1627  } else {
1628    rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1629    tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1630  }
1631
1632  if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1633    tx_flags |= (TxCSI | TxHBI);
1634    rx_flags |= RxATX;
1635  }
1636
1637#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1638  /* Can accept Jumbo packet */
1639  rx_flags |= RxAJAB;
1640#endif
1641
1642  outl (tx_flags, ioaddr + txcfg);
1643  outl (rx_flags, ioaddr + rxcfg);
1644}
1645
1646/**
1647 *  sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1648 *  @net_dev: the net device to read mode for
1649 *  @phy_addr: mii phy address
1650 *
1651 *  If the adapter is link-on, set the auto-negotiate enable/reset bit.
1652 *  autong_complete should be set to 0 when starting auto-negotiation.
1653 *  autong_complete should be set to 1 if we didn't start auto-negotiation.
1654 *  sis900_timer will wait for link on again if autong_complete = 0.
1655 */
1656
1657static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1658{
1659  struct sis900_private *sis_priv = net_dev->priv;
1660  int i = 0;
1661  u32 status;
1662
1663  while (i++ < 2)
1664    status = mdio_read(net_dev, phy_addr, MII_STATUS);
1665
1666  if (!(status & MII_STAT_LINK)){
1667    if(netif_msg_link(sis_priv))
1668      printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1669    sis_priv->autong_complete = 1;
1670    netif_carrier_off(net_dev);
1671    return;
1672  }
1673
1674  /* (Re)start AutoNegotiate */
1675  mdio_write(net_dev, phy_addr, MII_CONTROL,
1676       MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1677  sis_priv->autong_complete = 0;
1678}
1679
1680/**
1681 *  sis900_tx_timeout - sis900 transmit timeout routine
1682 *  @net_dev: the net device to transmit
1683 *
1684 *  print transmit timeout status
1685 *  disable interrupts and do some tasks
1686 */
1687
1688static void sis900_tx_timeout(struct net_device *net_dev)
1689{
1690  struct sis900_private *sis_priv = net_dev->priv;
1691  long ioaddr = net_dev->base_addr;
1692  unsigned long flags;
1693  int i;
1694
1695  if(netif_msg_tx_err(sis_priv))
1696    printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1697            net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1698
1699  /* Disable interrupts by clearing the interrupt mask. */
1700  outl(0x0000, ioaddr + imr);
1701
1702  /* use spinlock to prevent interrupt handler accessing buffer ring */
1703  spin_lock_irqsave(&sis_priv->lock, flags);
1704
1705  /* discard unsent packets */
1706  sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1707  for (i = 0; i < NUM_TX_DESC; i++) {
1708    struct sk_buff *skb = sis_priv->tx_skbuff[i];
1709
1710    if (skb) {
1711      pci_unmap_single(sis_priv->pci_dev,
1712        sis_priv->tx_ring[i].bufptr, skb->len,
1713        PCI_DMA_TODEVICE);
1714      dev_kfree_skb_irq(skb);
1715      sis_priv->tx_skbuff[i] = NULL;
1716      sis_priv->tx_ring[i].cmdsts = 0;
1717      sis_priv->tx_ring[i].bufptr = 0;
1718      sis_priv->stats.tx_dropped++;
1719    }
1720  }
1721  sis_priv->tx_full = 0;
1722  netif_wake_queue(net_dev);
1723
1724  spin_unlock_irqrestore(&sis_priv->lock, flags);
1725
1726  net_dev->trans_start = jiffies;
1727
1728  /* load Transmit Descriptor Register */
1729  outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1730
1731  /* Enable all known interrupts by setting the interrupt mask. */
1732  outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1733  return;
1734}
1735
1736/**
1737 *  sis900_start_xmit - sis900 start transmit routine
1738 *  @skb: socket buffer pointer to put the data being transmitted
1739 *  @net_dev: the net device to transmit with
1740 *
1741 *  Set the transmit buffer descriptor,
1742 *  and write TxENA to enable transmit state machine.
1743 *  tell upper layer if the buffer is full
1744 */
1745
1746static int
1747sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1748{
1749  struct sis900_private *sis_priv = net_dev->priv;
1750  long ioaddr = net_dev->base_addr;
1751  unsigned int  entry;
1752  unsigned long flags;
1753  unsigned int  index_cur_tx, index_dirty_tx;
1754  unsigned int  count_dirty_tx;
1755
1756  /* Don't transmit data before the complete of auto-negotiation */
1757  if(!sis_priv->autong_complete){
1758    netif_stop_queue(net_dev);
1759    return 1;
1760  }
1761
1762  spin_lock_irqsave(&sis_priv->lock, flags);
1763
1764  /* Calculate the next Tx descriptor entry. */
1765  entry = sis_priv->cur_tx % NUM_TX_DESC;
1766  sis_priv->tx_skbuff[entry] = skb;
1767
1768  /* set the transmit buffer descriptor and enable Transmit State Machine */
1769  sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1770    skb->data, skb->len, PCI_DMA_TODEVICE);
1771  sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1772  outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1773
1774  sis_priv->cur_tx ++;
1775  index_cur_tx = sis_priv->cur_tx;
1776  index_dirty_tx = sis_priv->dirty_tx;
1777
1778  for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1779    count_dirty_tx ++;
1780
1781  if (index_cur_tx == index_dirty_tx) {
1782    /* dirty_tx is met in the cycle of cur_tx, buffer full */
1783    sis_priv->tx_full = 1;
1784    netif_stop_queue(net_dev);
1785  } else if (count_dirty_tx < NUM_TX_DESC) {
1786    /* Typical path, tell upper layer that more transmission is possible */
1787    netif_start_queue(net_dev);
1788  } else {
1789    /* buffer full, tell upper layer no more transmission */
1790    sis_priv->tx_full = 1;
1791    netif_stop_queue(net_dev);
1792  }
1793
1794  spin_unlock_irqrestore(&sis_priv->lock, flags);
1795
1796  net_dev->trans_start = jiffies;
1797
1798  if (netif_msg_tx_queued(sis_priv))
1799    printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1800           "to slot %d.\n",
1801           net_dev->name, skb->data, (int)skb->len, entry);
1802
1803  return 0;
1804}
1805
1806/**
1807 *  sis900_interrupt - sis900 interrupt handler
1808 *  @irq: the irq number
1809 *  @dev_instance: the client data object
1810 *  @regs: snapshot of processor context
1811 *
1812 *  The interrupt handler does all of the Rx thread work,
1813 *  and cleans up after the Tx thread
1814 */
1815
1816static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1817{
1818  struct net_device *net_dev = dev_instance;
1819  struct sis900_private *sis_priv = net_dev->priv;
1820  int boguscnt = max_interrupt_work;
1821  long ioaddr = net_dev->base_addr;
1822  u32 status;
1823  unsigned int handled = 0;
1824
1825  spin_lock (&sis_priv->lock);
1826
1827  do {
1828    status = inl(ioaddr + isr);
1829
1830    if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1831      /* nothing intresting happened */
1832      break;
1833    handled = 1;
1834
1835    /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1836    if (status & (RxORN | RxERR | RxOK))
1837      /* Rx interrupt */
1838      sis900_rx(net_dev);
1839
1840    if (status & (TxURN | TxERR | TxIDLE))
1841      /* Tx interrupt */
1842      sis900_finish_xmit(net_dev);
1843
1844    /* something strange happened !!! */
1845    if (status & HIBERR) {
1846      if(netif_msg_intr(sis_priv))
1847        printk(KERN_INFO "%s: Abnormal interrupt,"
1848          "status %#8.8x.\n", net_dev->name, status);
1849      break;
1850    }
1851    if (--boguscnt < 0) {
1852      if(netif_msg_intr(sis_priv))
1853        printk(KERN_INFO "%s: Too much work at interrupt, "
1854          "interrupt status = %#8.8x.\n",
1855          net_dev->name, status);
1856      break;
1857    }
1858  } while (1);
1859
1860  if(netif_msg_intr(sis_priv))
1861    printk(KERN_DEBUG "%s: exiting interrupt, "
1862           "interrupt status = 0x%#8.8x.\n",
1863           net_dev->name, inl(ioaddr + isr));
1864
1865  spin_unlock (&sis_priv->lock);
1866  return IRQ_RETVAL(handled);
1867}
1868
1869/**
1870 *  sis900_rx - sis900 receive routine
1871 *  @net_dev: the net device which receives data
1872 *
1873 *  Process receive interrupt events,
1874 *  put buffer to higher layer and refill buffer pool
1875 *  Note: This function is called by interrupt handler,
1876 *  don't do "too much" work here
1877 */
1878
1879static int sis900_rx(struct net_device *net_dev)
1880{
1881  struct sis900_private *sis_priv = net_dev->priv;
1882  long ioaddr = net_dev->base_addr;
1883  unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1884  u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1885  int rx_work_limit;
1886
1887  if (netif_msg_rx_status(sis_priv))
1888    printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1889           "status:0x%8.8x\n",
1890           sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1891  rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1892
1893  while (rx_status & OWN) {
1894    unsigned int rx_size;
1895    unsigned int data_size;
1896
1897    if (--rx_work_limit < 0)
1898      break;
1899
1900    data_size = rx_status & DSIZE;
1901    rx_size = data_size - CRC_SIZE;
1902
1903#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1904    /* ``TOOLONG'' flag means jumbo packet recived. */
1905    if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1906      rx_status &= (~ ((unsigned int)TOOLONG));
1907#endif
1908
1909    if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1910      /* corrupted packet received */
1911      if (netif_msg_rx_err(sis_priv))
1912        printk(KERN_DEBUG "%s: Corrupted packet "
1913               "received, buffer status = 0x%8.8x/%d.\n",
1914               net_dev->name, rx_status, data_size);
1915      sis_priv->stats.rx_errors++;
1916      if (rx_status & OVERRUN)
1917        sis_priv->stats.rx_over_errors++;
1918      if (rx_status & (TOOLONG|RUNT))
1919        sis_priv->stats.rx_length_errors++;
1920      if (rx_status & (RXISERR | FAERR))
1921        sis_priv->stats.rx_frame_errors++;
1922      if (rx_status & CRCERR)
1923        sis_priv->stats.rx_crc_errors++;
1924      /* reset buffer descriptor state */
1925      sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1926    } else {
1927      struct sk_buff * skb;
1928
1929      /* This situation should never happen, but due to
1930         some unknow bugs, it is possible that
1931         we are working on NULL sk_buff :-( */
1932      if (sis_priv->rx_skbuff[entry] == NULL) {
1933        if (netif_msg_rx_err(sis_priv))
1934          printk(KERN_WARNING "%s: NULL pointer "
1935                "encountered in Rx ring\n"
1936                "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1937                net_dev->name, sis_priv->cur_rx,
1938                sis_priv->dirty_rx);
1939        break;
1940      }
1941
1942      pci_unmap_single(sis_priv->pci_dev,
1943        sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1944        PCI_DMA_FROMDEVICE);
1945      /* give the socket buffer to upper layers */
1946      skb = sis_priv->rx_skbuff[entry];
1947      skb_put(skb, rx_size);
1948      skb->protocol = eth_type_trans(skb, net_dev);
1949      netif_rx(skb);
1950
1951      /* some network statistics */
1952      if ((rx_status & BCAST) == MCAST)
1953        sis_priv->stats.multicast++;
1954      net_dev->last_rx = jiffies;
1955      sis_priv->stats.rx_bytes += rx_size;
1956      sis_priv->stats.rx_packets++;
1957
1958      /* refill the Rx buffer, what if there is not enought
1959       * memory for new socket buffer ?? */
1960      if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1961        /* not enough memory for skbuff, this makes a
1962         * "hole" on the buffer ring, it is not clear
1963         * how the hardware will react to this kind
1964         * of degenerated buffer */
1965        if (netif_msg_rx_status(sis_priv))
1966          printk(KERN_INFO "%s: Memory squeeze,"
1967            "deferring packet.\n",
1968            net_dev->name);
1969        sis_priv->rx_skbuff[entry] = NULL;
1970        /* reset buffer descriptor state */
1971        sis_priv->rx_ring[entry].cmdsts = 0;
1972        sis_priv->rx_ring[entry].bufptr = 0;
1973        sis_priv->stats.rx_dropped++;
1974        sis_priv->cur_rx++;
1975        break;
1976      }
1977      skb->dev = net_dev;
1978      sis_priv->rx_skbuff[entry] = skb;
1979      sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1980                  sis_priv->rx_ring[entry].bufptr =
1981        pci_map_single(sis_priv->pci_dev, skb->data,
1982          RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1983      sis_priv->dirty_rx++;
1984    }
1985    sis_priv->cur_rx++;
1986    entry = sis_priv->cur_rx % NUM_RX_DESC;
1987    rx_status = sis_priv->rx_ring[entry].cmdsts;
1988  } // while
1989
1990  /* refill the Rx buffer, what if the rate of refilling is slower
1991   * than consuming ?? */
1992  for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1993    struct sk_buff *skb;
1994
1995    entry = sis_priv->dirty_rx % NUM_RX_DESC;
1996
1997    if (sis_priv->rx_skbuff[entry] == NULL) {
1998      if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1999        /* not enough memory for skbuff, this makes a
2000         * "hole" on the buffer ring, it is not clear
2001         * how the hardware will react to this kind
2002         * of degenerated buffer */
2003        if (netif_msg_rx_err(sis_priv))
2004          printk(KERN_INFO "%s: Memory squeeze,"
2005            "deferring packet.\n",
2006            net_dev->name);
2007        sis_priv->stats.rx_dropped++;
2008        break;
2009      }
2010      skb->dev = net_dev;
2011      sis_priv->rx_skbuff[entry] = skb;
2012      sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
2013                  sis_priv->rx_ring[entry].bufptr =
2014        pci_map_single(sis_priv->pci_dev, skb->data,
2015          RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
2016    }
2017  }
2018  /* re-enable the potentially idle receive state matchine */
2019  outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
2020
2021  return 0;
2022}
2023
2024/**
2025 *  sis900_finish_xmit - finish up transmission of packets
2026 *  @net_dev: the net device to be transmitted on
2027 *
2028 *  Check for error condition and free socket buffer etc
2029 *  schedule for more transmission as needed
2030 *  Note: This function is called by interrupt handler,
2031 *  don't do "too much" work here
2032 */
2033
2034static void sis900_finish_xmit (struct net_device *net_dev)
2035{
2036  struct sis900_private *sis_priv = net_dev->priv;
2037
2038  for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
2039    struct sk_buff *skb;
2040    unsigned int entry;
2041    u32 tx_status;
2042
2043    entry = sis_priv->dirty_tx % NUM_TX_DESC;
2044    tx_status = sis_priv->tx_ring[entry].cmdsts;
2045
2046    if (tx_status & OWN) {
2047      /* The packet is not transmitted yet (owned by hardware) !
2048       * Note: the interrupt is generated only when Tx Machine
2049       * is idle, so this is an almost impossible case */
2050      break;
2051    }
2052
2053    if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
2054      /* packet unsuccessfully transmitted */
2055      if (netif_msg_tx_err(sis_priv))
2056        printk(KERN_DEBUG "%s: Transmit "
2057               "error, Tx status %8.8x.\n",
2058               net_dev->name, tx_status);
2059      sis_priv->stats.tx_errors++;
2060      if (tx_status & UNDERRUN)
2061        sis_priv->stats.tx_fifo_errors++;
2062      if (tx_status & ABORT)
2063        sis_priv->stats.tx_aborted_errors++;
2064      if (tx_status & NOCARRIER)
2065        sis_priv->stats.tx_carrier_errors++;
2066      if (tx_status & OWCOLL)
2067        sis_priv->stats.tx_window_errors++;
2068    } else {
2069      /* packet successfully transmitted */
2070      sis_priv->stats.collisions += (tx_status & COLCNT) >> 16;
2071      sis_priv->stats.tx_bytes += tx_status & DSIZE;
2072      sis_priv->stats.tx_packets++;
2073    }
2074    /* Free the original skb. */
2075    skb = sis_priv->tx_skbuff[entry];
2076    pci_unmap_single(sis_priv->pci_dev,
2077      sis_priv->tx_ring[entry].bufptr, skb->len,
2078      PCI_DMA_TODEVICE);
2079    dev_kfree_skb_irq(skb);
2080    sis_priv->tx_skbuff[entry] = NULL;
2081    sis_priv->tx_ring[entry].bufptr = 0;
2082    sis_priv->tx_ring[entry].cmdsts = 0;
2083  }
2084
2085  if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
2086      sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
2087    /* The ring is no longer full, clear tx_full and schedule
2088     * more transmission by netif_wake_queue(net_dev) */
2089    sis_priv->tx_full = 0;
2090    netif_wake_queue (net_dev);
2091  }
2092}
2093
2094/**
2095 *  sis900_close - close sis900 device
2096 *  @net_dev: the net device to be closed
2097 *
2098 *  Disable interrupts, stop the Tx and Rx Status Machine
2099 *  free Tx and RX socket buffer
2100 */
2101
2102static int sis900_close(struct net_device *net_dev)
2103{
2104  long ioaddr = net_dev->base_addr;
2105  struct sis900_private *sis_priv = net_dev->priv;
2106  struct sk_buff *skb;
2107  int i;
2108
2109  netif_stop_queue(net_dev);
2110
2111  /* Disable interrupts by clearing the interrupt mask. */
2112  outl(0x0000, ioaddr + imr);
2113  outl(0x0000, ioaddr + ier);
2114
2115  /* Stop the chip's Tx and Rx Status Machine */
2116  outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2117
2118  del_timer(&sis_priv->timer);
2119
2120  free_irq(net_dev->irq, net_dev);
2121
2122  /* Free Tx and RX skbuff */
2123  for (i = 0; i < NUM_RX_DESC; i++) {
2124    skb = sis_priv->rx_skbuff[i];
2125    if (skb) {
2126      pci_unmap_single(sis_priv->pci_dev,
2127        sis_priv->rx_ring[i].bufptr,
2128        RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
2129      dev_kfree_skb(skb);
2130      sis_priv->rx_skbuff[i] = NULL;
2131    }
2132  }
2133  for (i = 0; i < NUM_TX_DESC; i++) {
2134    skb = sis_priv->tx_skbuff[i];
2135    if (skb) {
2136      pci_unmap_single(sis_priv->pci_dev,
2137        sis_priv->tx_ring[i].bufptr, skb->len,
2138        PCI_DMA_TODEVICE);
2139      dev_kfree_skb(skb);
2140      sis_priv->tx_skbuff[i] = NULL;
2141    }
2142  }
2143
2144  /* Green! Put the chip in low-power mode. */
2145
2146  return 0;
2147}
2148
2149/**
2150 *  sis900_get_drvinfo - Return information about driver
2151 *  @net_dev: the net device to probe
2152 *  @info: container for info returned
2153 *
2154 *  Process ethtool command such as "ehtool -i" to show information
2155 */
2156
2157static void sis900_get_drvinfo(struct net_device *net_dev,
2158             struct ethtool_drvinfo *info)
2159{
2160  struct sis900_private *sis_priv = net_dev->priv;
2161
2162  strcpy (info->driver, SIS900_MODULE_NAME);
2163  strcpy (info->version, SIS900_DRV_VERSION);
2164  strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
2165}
2166
2167static u32 sis900_get_msglevel(struct net_device *net_dev)
2168{
2169  struct sis900_private *sis_priv = net_dev->priv;
2170  return sis_priv->msg_enable;
2171}
2172
2173static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
2174{
2175  struct sis900_private *sis_priv = net_dev->priv;
2176  sis_priv->msg_enable = value;
2177}
2178
2179static u32 sis900_get_link(struct net_device *net_dev)
2180{
2181  struct sis900_private *sis_priv = net_dev->priv;
2182  return mii_link_ok(&sis_priv->mii_info);
2183}
2184
2185static int sis900_get_settings(struct net_device *net_dev,
2186        struct ethtool_cmd *cmd)
2187{
2188  struct sis900_private *sis_priv = net_dev->priv;
2189  spin_lock_irq(&sis_priv->lock);
2190  mii_ethtool_gset(&sis_priv->mii_info, cmd);
2191  spin_unlock_irq(&sis_priv->lock);
2192  return 0;
2193}
2194
2195static int sis900_set_settings(struct net_device *net_dev,
2196        struct ethtool_cmd *cmd)
2197{
2198  struct sis900_private *sis_priv = net_dev->priv;
2199  int rt;
2200  spin_lock_irq(&sis_priv->lock);
2201  rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2202  spin_unlock_irq(&sis_priv->lock);
2203  return rt;
2204}
2205
2206static int sis900_nway_reset(struct net_device *net_dev)
2207{
2208  struct sis900_private *sis_priv = net_dev->priv;
2209  return mii_nway_restart(&sis_priv->mii_info);
2210}
2211
2212/**
2213 *  sis900_set_wol - Set up Wake on Lan registers
2214 *  @net_dev: the net device to probe
2215 *  @wol: container for info passed to the driver
2216 *
2217 *  Process ethtool command "wol" to setup wake on lan features.
2218 *  SiS900 supports sending WoL events if a correct packet is received,
2219 *  but there is no simple way to filter them to only a subset (broadcast,
2220 *  multicast, unicast or arp).
2221 */
2222
2223static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2224{
2225  struct sis900_private *sis_priv = net_dev->priv;
2226  long pmctrl_addr = net_dev->base_addr + pmctrl;
2227  u32 cfgpmcsr = 0, pmctrl_bits = 0;
2228
2229  if (wol->wolopts == 0) {
2230    pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2231    cfgpmcsr &= ~PME_EN;
2232    pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2233    outl(pmctrl_bits, pmctrl_addr);
2234    if (netif_msg_wol(sis_priv))
2235      printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2236    return 0;
2237  }
2238
2239  if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2240        | WAKE_BCAST | WAKE_ARP))
2241    return -EINVAL;
2242
2243  if (wol->wolopts & WAKE_MAGIC)
2244    pmctrl_bits |= MAGICPKT;
2245  if (wol->wolopts & WAKE_PHY)
2246    pmctrl_bits |= LINKON;
2247
2248  outl(pmctrl_bits, pmctrl_addr);
2249
2250  pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2251  cfgpmcsr |= PME_EN;
2252  pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2253  if (netif_msg_wol(sis_priv))
2254    printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2255
2256  return 0;
2257}
2258
2259static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2260{
2261  long pmctrl_addr = net_dev->base_addr + pmctrl;
2262  u32 pmctrl_bits;
2263
2264  pmctrl_bits = inl(pmctrl_addr);
2265  if (pmctrl_bits & MAGICPKT)
2266    wol->wolopts |= WAKE_MAGIC;
2267  if (pmctrl_bits & LINKON)
2268    wol->wolopts |= WAKE_PHY;
2269
2270  wol->supported = (WAKE_PHY | WAKE_MAGIC);
2271}
2272
2273static const struct ethtool_ops sis900_ethtool_ops = {
2274  .get_drvinfo  = sis900_get_drvinfo,
2275  .get_msglevel = sis900_get_msglevel,
2276  .set_msglevel = sis900_set_msglevel,
2277  .get_link = sis900_get_link,
2278  .get_settings = sis900_get_settings,
2279  .set_settings = sis900_set_settings,
2280  .nway_reset = sis900_nway_reset,
2281  .get_wol  = sis900_get_wol,
2282  .set_wol  = sis900_set_wol
2283};
2284
2285/**
2286 *  mii_ioctl - process MII i/o control command
2287 *  @net_dev: the net device to command for
2288 *  @rq: parameter for command
2289 *  @cmd: the i/o command
2290 *
2291 *  Process MII command like read/write MII register
2292 */
2293
2294static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2295{
2296  struct sis900_private *sis_priv = net_dev->priv;
2297  struct mii_ioctl_data *data = if_mii(rq);
2298
2299  switch(cmd) {
2300  case SIOCGMIIPHY:   /* Get address of MII PHY in use. */
2301    data->phy_id = sis_priv->mii->phy_addr;
2302    /* Fall Through */
2303
2304  case SIOCGMIIREG:   /* Read MII PHY register. */
2305    data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2306    return 0;
2307
2308  case SIOCSMIIREG:   /* Write MII PHY register. */
2309    if (!capable(CAP_NET_ADMIN))
2310      return -EPERM;
2311    mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2312    return 0;
2313  default:
2314    return -EOPNOTSUPP;
2315  }
2316}
2317
2318/**
2319 *  sis900_get_stats - Get sis900 read/write statistics
2320 *  @net_dev: the net device to get statistics for
2321 *
2322 *  get tx/rx statistics for sis900
2323 */
2324
2325static struct net_device_stats *
2326sis900_get_stats(struct net_device *net_dev)
2327{
2328  struct sis900_private *sis_priv = net_dev->priv;
2329
2330  return &sis_priv->stats;
2331}
2332
2333/**
2334 *  sis900_set_config - Set media type by net_device.set_config
2335 *  @dev: the net device for media type change
2336 *  @map: ifmap passed by ifconfig
2337 *
2338 *  Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2339 *  we support only port changes. All other runtime configuration
2340 *  changes will be ignored
2341 */
2342
2343static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2344{
2345  struct sis900_private *sis_priv = dev->priv;
2346  struct mii_phy *mii_phy = sis_priv->mii;
2347
2348  u16 status;
2349
2350  if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2351    /* we switch on the ifmap->port field. I couldn't find anything
2352     * like a definition or standard for the values of that field.
2353     * I think the meaning of those values is device specific. But
2354     * since I would like to change the media type via the ifconfig
2355     * command I use the definition from linux/netdevice.h
2356     * (which seems to be different from the ifport(pcmcia) definition) */
2357    switch(map->port){
2358    case IF_PORT_UNKNOWN: /* use auto here */
2359      dev->if_port = map->port;
2360      /* we are going to change the media type, so the Link
2361       * will be temporary down and we need to reflect that
2362       * here. When the Link comes up again, it will be
2363       * sensed by the sis_timer procedure, which also does
2364       * all the rest for us */
2365      netif_carrier_off(dev);
2366
2367      /* read current state */
2368      status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2369
2370      /* enable auto negotiation and reset the negotioation
2371       * (I don't really know what the auto negatiotiation
2372       * reset really means, but it sounds for me right to
2373       * do one here) */
2374      mdio_write(dev, mii_phy->phy_addr,
2375           MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2376
2377      break;
2378
2379    case IF_PORT_10BASET: /* 10BaseT */
2380      dev->if_port = map->port;
2381
2382      /* we are going to change the media type, so the Link
2383       * will be temporary down and we need to reflect that
2384       * here. When the Link comes up again, it will be
2385       * sensed by the sis_timer procedure, which also does
2386       * all the rest for us */
2387      netif_carrier_off(dev);
2388
2389      /* set Speed to 10Mbps */
2390      /* read current state */
2391      status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2392
2393      /* disable auto negotiation and force 10MBit mode*/
2394      mdio_write(dev, mii_phy->phy_addr,
2395           MII_CONTROL, status & ~(MII_CNTL_SPEED |
2396          MII_CNTL_AUTO));
2397      break;
2398
2399    case IF_PORT_100BASET: /* 100BaseT */
2400    case IF_PORT_100BASETX: /* 100BaseTx */
2401      dev->if_port = map->port;
2402
2403      /* we are going to change the media type, so the Link
2404       * will be temporary down and we need to reflect that
2405       * here. When the Link comes up again, it will be
2406       * sensed by the sis_timer procedure, which also does
2407       * all the rest for us */
2408      netif_carrier_off(dev);
2409
2410      /* set Speed to 100Mbps */
2411      /* disable auto negotiation and enable 100MBit Mode */
2412      status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2413      mdio_write(dev, mii_phy->phy_addr,
2414           MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2415           MII_CNTL_SPEED);
2416
2417      break;
2418
2419    case IF_PORT_10BASE2: /* 10Base2 */
2420    case IF_PORT_AUI: /* AUI */
2421    case IF_PORT_100BASEFX: /* 100BaseFx */
2422                  /* These Modes are not supported (are they?)*/
2423      return -EOPNOTSUPP;
2424      break;
2425
2426    default:
2427      return -EINVAL;
2428    }
2429  }
2430  return 0;
2431}
2432
2433/**
2434 *  sis900_mcast_bitnr - compute hashtable index
2435 *  @addr: multicast address
2436 *  @revision: revision id of chip
2437 *
2438 *  SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2439 *  hash table, which makes this function a little bit different from other drivers
2440 *  SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2441 *    multicast hash table.
2442 */
2443
2444static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2445{
2446
2447  u32 crc = ether_crc(6, addr);
2448
2449  /* leave 8 or 7 most siginifant bits */
2450  if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2451    return ((int)(crc >> 24));
2452  else
2453    return ((int)(crc >> 25));
2454}
2455
2456
2457/**
2458 *  sis900_remove - Remove sis900 device
2459 *  @pci_dev: the pci device to be removed
2460 *
2461 *  remove and release SiS900 net device
2462 */
2463
2464static void __devexit sis900_remove(struct pci_dev *pci_dev)
2465{
2466  struct net_device *net_dev = pci_get_drvdata(pci_dev);
2467  struct sis900_private * sis_priv = net_dev->priv;
2468  struct mii_phy *phy = NULL;
2469
2470  while (sis_priv->first_mii) {
2471    phy = sis_priv->first_mii;
2472    sis_priv->first_mii = phy->next;
2473    kfree(phy);
2474  }
2475
2476  pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2477    sis_priv->rx_ring_dma);
2478  pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2479    sis_priv->tx_ring_dma);
2480  unregister_netdev(net_dev);
2481  free_netdev(net_dev);
2482  pci_release_regions(pci_dev);
2483  pci_set_drvdata(pci_dev, NULL);
2484}
2485
2486#ifdef CONFIG_PM
2487
2488static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2489{
2490  struct net_device *net_dev = pci_get_drvdata(pci_dev);
2491  long ioaddr = net_dev->base_addr;
2492
2493  if(!netif_running(net_dev))
2494    return 0;
2495
2496  netif_stop_queue(net_dev);
2497  netif_device_detach(net_dev);
2498
2499  /* Stop the chip's Tx and Rx Status Machine */
2500  outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2501
2502  pci_set_power_state(pci_dev, PCI_D3hot);
2503  pci_save_state(pci_dev);
2504
2505  return 0;
2506}
2507
2508static int sis900_resume(struct pci_dev *pci_dev)
2509{
2510  struct net_device *net_dev = pci_get_drvdata(pci_dev);
2511  struct sis900_private *sis_priv = net_dev->priv;
2512  long ioaddr = net_dev->base_addr;
2513
2514  if(!netif_running(net_dev))
2515    return 0;
2516  pci_restore_state(pci_dev);
2517  pci_set_power_state(pci_dev, PCI_D0);
2518
2519  sis900_init_rxfilter(net_dev);
2520
2521  sis900_init_tx_ring(net_dev);
2522  sis900_init_rx_ring(net_dev);
2523
2524  set_rx_mode(net_dev);
2525
2526  netif_device_attach(net_dev);
2527  netif_start_queue(net_dev);
2528
2529  /* Workaround for EDB */
2530  sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2531
2532  /* Enable all known interrupts by setting the interrupt mask. */
2533  outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2534  outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2535  outl(IE, ioaddr + ier);
2536
2537  sis900_check_mode(net_dev, sis_priv->mii);
2538
2539  return 0;
2540}
2541#endif /* CONFIG_PM */
2542
2543static struct pci_driver sis900_pci_driver = {
2544  .name   = SIS900_MODULE_NAME,
2545  .id_table = sis900_pci_tbl,
2546  .probe    = sis900_probe,
2547  .remove   = __devexit_p(sis900_remove),
2548#ifdef CONFIG_PM
2549  .suspend  = sis900_suspend,
2550  .resume   = sis900_resume,
2551#endif /* CONFIG_PM */
2552};
2553
2554static int __init sis900_init_module(void)
2555{
2556/* when a module, this is printed whether or not devices are found in probe */
2557#ifdef MODULE
2558  printk(version);
2559#endif
2560
2561  return pci_register_driver(&sis900_pci_driver);
2562}
2563
2564static void __exit sis900_cleanup_module(void)
2565{
2566  pci_unregister_driver(&sis900_pci_driver);
2567}
2568
2569module_init(sis900_init_module);
2570module_exit(sis900_cleanup_module);
2571
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